IP Library Granted Patent US 9,805,941
Granted Patent B2
US 9,805,941 · App. 15/400,368 · Granted Oct 31, 2017

Integrating atomic scale processes: ALD (atomic layer deposition) and ALE (atomic layer etch)

Inventors: Keren Jacobs Kanarik (Los Altos, CA); Jeffrey Marks (Saratoga, CA); Harmeet Singh (Fremont, CA); Samantha Tan (Fremont, CA); Alexander Kabansky (Santa Clara, CA); Wenbing Yang (Fremont, CA); Taeseung Kim (Fremont, CA); Dennis M. Hausmann (Lake Oswego, OR); Thorsten Lill (Santa Clara, CA)
Assignee: Lam Research Corporation
H01L21/30655C23C16/45527C23C16/45544H01J37/32009H01J37/32449H01L21/0228H01L21/67069H01L21/6831H01J2237/334H01L21/02274H01L43/12
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,805,941
App. No.
15/400,368
Granted
Oct 31, 2017
Kind
B2
Abstract

Methods are provided for integrating atomic layer etch and atomic layer deposition by performing both processes in the same chamber or reactor. Methods involve sequentially alternating between atomic layer etch and atomic layer deposition processes to prevent feature degradation during etch, improve selectivity, and encapsulate sensitive layers of a semiconductor substrate.

Claims (48)

1. An apparatus for processing substrates, the apparatus comprising:

one or more process chambers, each process chamber comprising a chuck;

one or more gas inlets into the process chambers and associated flow-control hardware; and

a controller having at least one processor and a memory, wherein

the at least one processor and the memory are communicatively connected with one another,

the at least one processor is at least operatively connected with the flow-control hardware, and

the memory stores computer-executable instructions for controlling the at least one processor to at least control the flow-control hardware to:

etch the substrate by atomic layer etch in a chamber; and

deposit a film by atomic layer deposition,

wherein the etching and the depositing are performed without breaking vacuum.

2. The apparatus of claim 1 , wherein the memory further stores computer-executable instructions for controlling the at least one processor to at least control the flow-control hardware to perform the etching in cycles, a cycle comprising:

(i) introducing an etching gas to modify the surface of the substrate; and

(ii) introducing a removal gas to remove at least some of the modified surface.

3. The apparatus of claim 1 , wherein the memory further stores computer-executable instructions for controlling the at least one processor to at least control the flow-control hardware to perform the depositing in cycles, a cycle comprising:

(i) introducing a deposition precursor to modify the surface of the substrate; and

(ii) introducing a reducing agent to deposit the film.

4. The apparatus of claim 2 , further comprising a plasma generator, the memory further stores computer-executable instructions for igniting the plasma when the etching gas is introduced.

5. The apparatus of claim 2 , further comprising a plasma generator, wherein the memory further stores computer-executable instructions for applying a bias to the substrate.

6. The apparatus of claim 1 , wherein the computer-executable instructions for the etching and the depositing are configured to deposit material on the substrate.

7. The apparatus of claim 1 , wherein the computer-executable instructions for the etching and the depositing are configured to etch material on the substrate.

8. The apparatus of claim 1 , further comprising a plasma generator, the memory further stores computer-executable instructions for directionally sputtering the substrate.

9. The apparatus of claim 3 , further comprising a plasma generator, wherein the memory further stores computer-executable instructions for igniting the plasma.

10. The apparatus of claim 1 , wherein the etching gas is a chlorine-containing compound.

11. The apparatus of claim 1 , wherein the etching and the depositing is performed in the same chamber.

12. The apparatus of claim 1 , wherein the memory further stores computer-executable instructions for controlling the at least one processor to at least control the flow-control hardware to perform the etching nonconformally.

13. The apparatus of claim 2 , wherein the computer-executable instructions for performing a cycle comprises instructions for etching between about 1 Å to about 50 Å of film.

14. The apparatus of claim 2 , wherein the memory further stores computer-executable instructions for purging between exposures.

15. The apparatus of claim 3 , wherein the memory further stores computer-executable instructions for purging between exposures.

16. An apparatus for processing substrates, the apparatus comprising:

one or more process chambers, each process chamber comprising a chuck;

one or more gas inlets into the process chambers and associated flow-control hardware; and

a controller having at least one processor and a memory, wherein

the at least one processor and the memory are communicatively connected with one another,

the at least one processor is at least operatively connected with the flow-control hardware, and

the memory stores computer-executable instructions for controlling the at least one processor to at least control the flow-control hardware to:

(a) expose a substrate to alternating pulses of an etchant and purge gas to etch the substrate layer by layer;

(b) expose the substrate to alternating pulses of a reducing agent and a precursor to deposit a film on the etched substrate; and

(c) repeat (a) and (b) without breaking vacuum between performing (a) and (b).

17. The apparatus of claim 16 , wherein the removal gas is a carrier gas selected from the group consisting of N 2 , Ar, He, and Ne.

18. The apparatus of claim 16 , wherein (a) and (b) are performed in the same chamber of the one or more process chambers and (a) and (b) are performed sequentially.

19. The apparatus of claim 16 , wherein the memory further stores computer-executable instructions for purging between the alternating pulses of the etchant and the purge gas in (a).

20. The apparatus of claim 16 , wherein the memory further stores computer-executable instructions for purging between the alternating pulses of the reducing agent and the precursor in (b).

21. The apparatus of claim 16 , further comprising a plasma generator, wherein the memory further stores computer-executable instructions for applying a bias to the substrate.

22. The apparatus of claim 16 , further comprising a plasma generator, the memory further stores computer-executable instructions for directionally sputtering the substrate.

23. The apparatus of claim 16 , further comprising a plasma generator, wherein the memory further stores computer-executable instructions for igniting a plasma when exposing the substrate to the removal gas.

24. The apparatus of claim 16 , further comprising a plasma generator, wherein the memory further stores computer-executable instructions for igniting a plasma when exposing the substrate to the second reactant.

25. The apparatus of claim 16 , wherein the computer-executable instructions for the performing (a) and (b) are configured to deposit material on the substrate.

26. The apparatus of claim 16 , wherein the computer-executable instructions for performing (a) and (b) are configured to etch material on the substrate.

Continuity (3)
Division 14696254 · Apr 24, 2015
Provisional Application 62102463 · Jan 12, 2015
Related Publication 20170117159A1 · Apr 27, 2017