IP Library › Granted Patent US 9,817,935
Granted Patent B2
US 9,817,935 · App. 14/334,249 · Granted Nov 14, 2017

Interlaced bi-sensor super-resolution enhancement

Inventors: Munir Eldesouki (Riyadh, SA); Faisal Muhammed Al-Salem (Riyadh, SA)
Assignee: KING ABDULAZIZ CITY FOR SCIENCE AND TECHNOLOGY
G06F17/5072G06T3/4053H01L27/1461H01L27/14605H01L27/14634H04N5/2258H04N5/347H04N5/3696H01L27/14643
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,817,935
App. No.
14/334,249
Granted
Nov 14, 2017
Kind
B2
Abstract

Interlaced bi-sensor super-resolution enhancement techniques and a resultant scalable pixel array suitable for a mega-pixel design are disclosed. The method includes interlacing a first array of pixels of a first size with a second array of pixels of a second size. The interlacing of the first array of pixels with the second array of pixels avoids crossing two or more photosensitive areas of the first array of pixels and the second array of pixels.

Claims (25)

1. A method comprising:

interlacing a first array of pixels of a first size with a second array of pixels of a second size, wherein the interlacing of the first array of pixels with the second array of pixels avoids a crossover of two or more photodiodes of the first array of pixels and the second array of pixels; and

determining a condition to avoid overlap of photodiodes of each of the first array of pixels and the second array of pixels, comprising:

P 2 >P 1 ;

P 2 =s×P 1 ;

s =scaling factor:

a=P 2 −P 1 −min_spacing_rule;

P 2 =s×P 1 ; and

2 a 2 /P 2 2 <FF<4 a 2 /P 2 2 ,

wherein, P 1 is a size of photodiodes of the first array of pixels, P 2 is a size of photodiodes of the second array of pixels, “a” is an area of the photodiodes, min_spacing_rule is a technology dependent minimum well spacing rule, and FF is a fill factor, which is a ratio of photosensitive part of the pixel to entire pixel area; and

manufacturing the first array of pixels interlaced with the second array of pixels.

2. The method of claim 1 , wherein the interlacing of the first array of pixels with the second array of pixels forms a repeatable modular block for an interlaced bi-sensor super-resolution pixel array.

3. The method of claim 2 , wherein the repeatable modular block is copied and pasted to form a scalable array for a mega pixel design.

4. The method of claim 1 , wherein pixels of the first array of pixels and the second array of pixels have photodiodes of a same size.

5. The method of claim 4 , wherein the first array of pixels and the second array of pixels have pixels of a different pitch.

6. The method of claim 5 , wherein a pitch of the first array of pixels and the second array of pixels are different in both a horizontal measurement and vertical measurement.

7. The method of claim 5 , wherein the pitch of the first array of pixels and the second array of pixels are different in either a horizontal measurement or a vertical measurement.

8. The method of claim 5 , wherein the pixels of the first array of pixels and the second array of pixels are within a specific ratio to ensure that the two or more photosensitive areas of the first array of pixels and the second array of pixels do not cross.

9. The method of claim 1 , wherein only a single photodiode of each of the first array of pixels and the second array of pixels cross over when interlaced such that one photodiode laid out in the crossed location serves for both pixels of the array of pixels and the second array of pixels.

10. The method of claim 1 , further comprising determining a minimum well spacing between the photodiodes of the array of pixels and the second array of pixels to avoid design rule check (DRC) violation.

11. The method of claim 1 , wherein the scaling factor is in one dimension or two dimensions.

12. The method of claim 1 , further comprising removing pixels of the first array of pixels or the second array of pixels to avoid DRC errors and/or crossing two or more photodiodes of the first array of pixels and the second array of pixels during the interlacing.

13. The method of claim 1 , wherein the first array of pixels is a block of 5×5 pixels.

14. The method of claim 13 , wherein the second array of pixels is a block of 4×4 pixels.

15. The method of claim 1 , wherein an area of the photodiodes in the first array of pixels is equal to the area of the photodiodes in the second array of pixels.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 17, 2014
From: ELDESOUKI, MUNIR; AL-SALEM, FAISAL MUHAMMED
To: KING ABDULAZIZ CITY FOR SCIENCE AND TECHNOLOGY
Reel/Frame 033336/0579 →
Continuity (1)
Related Publication 20160019329A1 · Jan 21, 2016