Display device
A display device includes a display panel including gate lines, data lines, and pixels connected to the gate line and the data lines, a gate driver driving the gate lines, a level shifter applying a gate clock signal to the gate driver, a data driver driving the data lines, a timing controller generating control signals to control the level shifter, the gate driver, and the data driver, and a backlight unit providing light to the display panel. The level shifter sets a voltage level of a gate-on voltage of the gate clock signal to a voltage level of a first gate-on voltage or a voltage level of a second gate-on voltage higher than the first gate-on voltage in response to a gate-on control signal.
1. A display device, comprising:
a display panel comprising a plurality of gate lines, a plurality of data lines, and a plurality of pixels, wherein each pixel is connected to a corresponding gate line of the gate lines and a corresponding data line of the data lines;
a gate driver configured to drive the gate lines;
a level shifter configured to apply a gate clock signal to the gate driver;
a data driver configured to drive the data lines;
a timing controller configured to generate a gate-on control signal and a plurality of control signals that control the level shifter, the gate driver, and the data driver; and
a backlight unit configured to provide a light to the display panel,
wherein the level shifter is configured to set a voltage level of a gate-on voltage of the gate clock signal to a voltage level of a first gate-on voltage or a voltage level of a second gate-on voltage in response to the gate-on control signal,
wherein the voltage level of the second gate-on voltage is higher than the voltage level of the first gate-on voltage,
wherein, during one frame, the first gate-on voltage is applied as the gate-on voltage to a portion of the gate lines disposed closest to the backlight unit, and the second gate-on voltage is applied as the gate-on voltage to gate lines other than the portion of the gate lines disposed closest to the backlight unit,
wherein each gate line receives either the first gate-on voltage or the second gate-on voltage during the one frame,
wherein the backlight unit is configured to be turned on while the gate-on control signal is activated and turned off while the gate-on control signal is not activated,
wherein the level shifter is configured to set the gate-on voltage of the gate clock signal to the second gate-on voltage while the gate-on control signal is activated, and set the gate-on voltage of the gate clock signal to the first gate-on voltage while the gate-on control signal is not activated.
2. The display device of claim 1 ,
wherein the gate-on control signal is activated while the portion of the gate lines disposed closest to the backlight unit is activated, and
the level shifter is configured to output the first gate-on voltage as the gate-on voltage while the gate-on control signal is activated, and output the second gate-on voltage as the gate-on voltage while the gate-on control signal is not activated.
3. The display device of claim 2 , wherein the gate-on control signal is output by the timing controller.
4. The display device of claim 1 , wherein the level shifter comprises:
a voltage generator configured to output the first gate-on voltage and the second gate-on voltage;
a gate-on voltage selector configured to output one of the first gate-on voltage and the second gate-on voltage as the gate-on voltage in response to the gate-on control signal; and
a gate clock generator configured to receive the gate-on voltage and a gate-off voltage, and output the gate clock signal in response to a gate pulse signal received from the timing controller.
5. The display device of claim 4 , wherein the gate clock generator comprises:
a signal generator configured to generate a first gate pulse signal and a second gate pulse signal in response to the gate pulse signal;
a first switching circuit configured to output one of the gate-on voltage and the gate-off voltage in response to the first gate pulse signal; and
a second switching circuit configured to output one of the gate-on voltage and the gate-off voltage in response to the second gate pulse signal.
6. A display device, comprising:
a display panel comprising a plurality of gate lines, a plurality of data lines, and a plurality of pixels, wherein each pixel is connected to a corresponding gate line of the gate lines and a corresponding data line of the data lines;
a gate driver configured to drive the gate lines;
a level shifter configured to apply a gate clock signal to the gate driver;
a data driver configured to drive the data lines;
a timing controller configured to generate a gate-on control signal and a plurality of control signals that control the level shifter, the gate driver, and the data driver; and
a backlight unit configured to provide a light to the display panel,
wherein the level shifter is configured to set a voltage level of a gate-on voltage of the gate clock signal to a voltage level of a first gate-on voltage or a voltage level of a second gate-on voltage in response to the gate-on control signal,
wherein the voltage level of the second gate-on voltage is higher than the voltage level of the first gate-on voltage,
wherein the data driver comprises;
a shift register configured to receive a vertical synchronization start signal from the timing controller, and output a plurality of shift signals in synchronization with a line latch signal;
a register configured to store a plurality of gate-on information signals; and
a logic circuit configured to output the gate-on control signal in response to at least one of the shift signals and the gate-on information signals.
7. The display device of claim 6 , wherein the gate-on information signals are set to allow the gate-on control signal to be activated while a portion of the gate lines disposed closest to the backlight unit is activated.
8. The display devices of claim 7 , wherein the level shifter is configured to set the voltage level of the gate-on voltage of the gate clock signal to one of the voltage level of the first gate-on voltage and the voltage level of the second gate-on voltage in response to the vertical synchronization start signal and the gate-on control signal received from the timing controller.
9. The display device of claim 8 , wherein the level shifter comprises:
a voltage generator configured to output the first gate-on voltage and the second gate-on voltage;
a gate-on voltage selector configured to output one of the first gate-on voltage and the second gate-on voltage as the gate-on voltage in response to the vertical synchronization start signal and the gate-on control signal; and
a gate clock generator configured to receive the gate-on voltage and a gate-off voltage, and output the gate clock signal in response to a gate pulse signal received from the timing controller.
10. The display device of claim 9 , wherein the gate-on voltage selector comprises:
a first level shifter configured to boost the vertical synchronization start signal and output a boosted vertical synchronization start signal;
a first output circuit configured to output the first gate-on voltage as the gate-on voltage in response to the boosted vertical synchronization start signal;
a second level shifter configured to boost the gate-on control signal and output a boosted gate-on control signal; and
a second output circuit configured to output the second gate-on voltage as the gate-on voltage in response to the boosted gate-on control signal.
11. The display device of claim 10 , wherein the first output circuit comprises:
a first diode connected between the boosted vertical synchronization start signal and a first node;
a first capacitor connected between the first node and a ground voltage;
a first transistor connected between the first node and the ground voltage; and
a second transistor connected between the first gate-on voltage and an output node.
12. The display device of claim 11 , wherein the second output circuit comprises:
a second diode connected between the boosted gate-on control signal and a second node;
a second capacitor connected between the second node and the ground voltage;
a third transistor connected between the second node and the ground voltage; and
a fourth transistor connected between the second gate-on voltage and an output node.
13. The display device of claim 1 , wherein the level shifter comprises:
a voltage generator configured to output the first gate-on voltage and the second gate-on voltage;
a gate-on voltage selector configured to output one of the first gate-on voltage and the second gate-on voltage as the gate-on voltage in response to a backlight control signal received from the timing controller; and
a gate clock generator configured to receive the gate-on voltage and a gate-off voltage, and output the gate clock signal in response to a gate pulse signal received from the timing controller.
14. The display device of claim 13 , wherein the gate-on voltage selector comprises:
a first level shifter configured to boost the backlight control signal and output the boosted backlight control signal;
a first output circuit configured to output the second gate-on voltage as the gate-on voltage in response to the boosted backlight control signal;
an inverter configured to receive the backlight control signal, invert the backlight control signal, and output the inverted backlight control signal;
a second level shifter configured to boost the inverted backlight control signal and output the boosted inverted backlight control signal; and
a second output circuit configured to output the first gate-on voltage as the gate-on voltage in response to the boosted inverted backlight control signal.
15. The display device of claim 14 , wherein the first output circuit comprises:
a first capacitor connected between the boosted backlight control signal and a ground voltage; and
a first transistor connected between the second gate-on voltage and an output node.
16. The display device of claim 15 , wherein the second output circuit comprises:
a second capacitor connected between the boosted inverted backlight control signal and the ground voltage; and
a second transistor connected between the first gate-on voltage and the output node.