IP Library › Granted Patent US 9,824,627
Granted Patent B2
US 9,824,627 · App. 14/733,193 · Granted Nov 21, 2017

Display circuit and display apparatus

Inventors: Eiji Kanda (Yokohama, JP); Masayuki Kumeta (Yokohama, JP); Ryo Ishii (Yokohama, JP)
Assignee: SAMSUNG DISPLAY CO., LTD.
G09G3/3233G09G3/3241G09G2300/0465G09G2300/0814G09G2300/0819G09G2300/0842G09G2300/0861G09G2310/08G09G2320/043
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Quick Facts
Patent No.
US 9,824,627
App. No.
14/733,193
Granted
Nov 21, 2017
Kind
B2
Abstract

A display circuit includes a plurality of pixel circuits and a shared compensation transistor. Each pixel circuit includes a driving transistor to control light emission of a light emitter. The compensation transistor is to compensate the threshold voltages of the driving transistors of the pixel circuits.

Claims (42)

1. A display circuit, comprising:

a plurality of pixel circuits, each pixel circuit including a driving transistor to control light emission of a light emitter;

an initialization transistor coupled to a common node of the pixel circuits, the initialization transistor to initialize the common node; and

a compensation transistor coupled to the common node, the compensation transistor to compensate threshold voltages of the driving transistors of the pixel circuits, wherein

the pixel circuits share the initialization transistor and the compensation transistor, and wherein

the initialization transistor and the compensation transistor are coupled in parallel between the common node and a scan line.

2. The display circuit as claimed in claim 1 , wherein:

each of the pixel circuits includes a capacitive element,

the driving transistor includes a first terminal connected to a power supply, a second terminal connected to a first terminal of the light emitter, and a control terminal, the driving transistor to connect the power supply and the first terminal of the 1 emitter based on a voltage applied to the control terminal to enable the light emitter to selectively emit light,

the capacitive element having a first end connected to the control terminal of the driving transistor and a second end connected to the common node of the pixel circuits, and

one of a first or a second terminal of the compensation transistor is connected to the common node.

3. The display circuit as claimed in claim 2 , wherein one of the pixel circuits includes the compensation transistor.

4. The display circuit as claimed in claim 3 , wherein the compensation transistor and the driving transistor have a same polarity.

5. The display circuit as claimed in claim 4 , wherein the compensation transistor and the driving transistor have substantially a same channel width and channel length.

6. The display circuit as claimed in claim 5 , wherein the compensation transistor and the driving transistor have a same channel direction.

7. The display circuit as claimed in claim 6 , wherein the compensation transistor and the driving transistor are oxide transistors.

8. The display circuit as claimed in claim 7 ,

wherein the initialization transistor initializes a potential of the common node to allow the common node to have certain potential.

9. The display circuit as claimed in claim 8 , wherein one of a first or a second terminal of the initialization transistor is connected to the common node.

10. The display circuit as claimed in claim 9 , wherein another one of the pixel circuits includes the initialization transistor.

11. The display circuit as claimed in claim 9 , wherein the pixel circuit including the compensation transistor includes the initialization transistor.

12. A display apparatus, comprising:

a display circuit including a plurality of pixel circuits, each pixel circuit including a driving transistor to control light emission of a light emitter, an initialization transistor coupled to a common node of the pixel circuits, and a compensation transistor coupled to the common node, the initialization transistor to initialize the common node, the compensation transistor to compensate threshold voltages of the driving transistors of the pixel circuits, wherein

the pixel circuits share the initialization transistor and the compensation transistor, and wherein

the initialization transistor and the compensation transistor are coupled in parallel between the common node and a scan line.

13. A circuit, comprising:

a first pixel circuit;

a second pixel circuit;

a first transistor coupled to a common node of the first and second pixel circuits, the first transistor to initialize the common node; and

a second transistor coupled to the common node, the second transistor to compensate threshold voltages of driving transistors in the first pixel circuit and the second pixel circuit, wherein

the first transistor and the second transistor are shared by the first and second pixel circuits, and wherein

the first and second transistors are coupled in parallel between the common node and a first scan line.

14. The circuit as claimed in claim 13 , wherein the first pixel circuit includes the second transistor.

15. The circuit as claimed in claim 13 , wherein the first pixel circuit is coupled to the second transistor.

16. The circuit as claimed in claim 13 , wherein the second transistor and the driving transistor of the first and second pixel circuits have at least two of a same polarity, substantially a same size, a same channel direction, or are oxide transistors.

17. The circuit as claimed in claim 16 , wherein the size includes channel width and channel length.

18. The circuit as claimed in claim 13 , wherein:

the first and second pixel circuits are connected to a second scan line, and

the second transistor is connected to the first scan line different from the second scan line.

19. The circuit as claimed in claim 3 , wherein

the first transistor and the second transistor are to output signals along a same signal line.

20. The display circuit as claimed in claim 1 , wherein the initialization transistor and the compensation transistor are diode-connected.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 8, 2015
From: KANDA, EIJI; KUMETA, MASAYUKI; ISHII, RYO
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 035856/0066 →
Priority Claims (1)
JP 2014-121464 · Jun 12, 2014 · national
Continuity (1)
Related Publication 20150364085A1 · Dec 17, 2015