IP Library › Granted Patent US 9,831,325
Granted Patent B2
US 9,831,325 · App. 15/204,085 · Granted Nov 28, 2017

Semiconductor device

Inventors: Toshiyuki Miyamoto (Kanuma, JP); Masafumi Nomura (Tochigi, JP); Takashi Hamochi (Shimotsuga, JP); Kenichi Okazaki (Tochigi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/66969H01L29/401H01L29/42384H01L29/495H01L29/4908H01L29/513H01L29/518H01L29/66742H01L29/7869H01L29/78606H01L29/78696
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,831,325
App. No.
15/204,085
Granted
Nov 28, 2017
Kind
B2
Abstract

A highly reliable semiconductor device the yield of which can be prevented from decreasing due to electrostatic discharge damage is provided. A semiconductor device is provided which includes a gate electrode layer, a first gate insulating layer over the gate electrode layer, a second gate insulating layer being over the first gate insulating layer and having a smaller thickness than the first gate insulating layer, an oxide semiconductor layer over the second gate insulating layer, and a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer. The first gate insulating layer contains nitrogen and has a spin density of 1×10 17 spins/cm 3 or less corresponding to a signal that appears at a g-factor of 2.003 in electron spin resonance spectroscopy. The second gate insulating layer contains nitrogen and has a lower hydrogen concentration than the first gate insulating layer.

Claims (33)

1. A method for manufacturing a semiconductor device, comprising:

forming a gate electrode over a substrate;

forming a first gate insulating layer including nitrogen after forming the gate electrode;

forming a second gate insulating layer including nitrogen after forming the first gate insulating layer;

forming an oxide semiconductor layer after forming the second gate insulating layer; and

forming a source electrode and a drain electrode electrically connected to the oxide semiconductor layer,

wherein the second gate insulating layer has a lower hydrogen concentration than the first gate insulating layer, and

wherein a content of indium is higher than a content of gallium in the oxide semiconductor layer that is closer to the gate electrode, and a content of indium is lower than or equal to a content of gallium in the oxide semiconductor layer that is farther from the gate electrode.

2. The method for manufacturing a semiconductor device according to claim 1 , wherein the first gate insulating layer is formed by a mixed gas of silane, nitrogen and ammonia, and the second gate insulating layer is formed by a mixed gas of silane and nitrogen.

3. The method for manufacturing a semiconductor device according to claim 1 , wherein the first gate insulating layer has a spin density of 1×10 17 spins/cm 3 or less corresponding to a signal that appears at a g-factor of 2.003 in electron spin resonance spectroscopy.

4. The method for manufacturing a semiconductor device according to claim 1 , wherein the first gate insulating layer has fewer defects than the second gate insulating layer.

5. A method for manufacturing a semiconductor device, comprising:

forming a gate electrode over a substrate;

forming a first gate insulating layer including nitrogen after forming the gate electrode;

forming a second gate insulating layer including nitrogen after forming the first gate insulating layer;

forming an oxide semiconductor layer after forming the second gate insulating layer; and

forming a source electrode and a drain electrode electrically connected to the oxide semiconductor layer,

wherein the second gate insulating layer has a lower hydrogen concentration than the first gate insulating layer,

wherein the first gate insulating layer is thicker than the second gate insulating layer, and

wherein a content of indium is higher than a content of gallium in the oxide semiconductor layer that is closer to the gate electrode, and a content of indium is lower than or equal to a content of gallium in the oxide semiconductor layer that is farther from the gate electrode.

6. The method for manufacturing a semiconductor device according to claim 5 , wherein the first gate insulating layer is formed by a mixed gas of silane, nitrogen and ammonia, and the second gate insulating layer is formed by a mixed gas of silane and nitrogen.

7. The method for manufacturing a semiconductor device according to claim 5 , wherein the first gate insulating layer has a spin density of 1×10 17 spins/cm 3 or less corresponding to a signal that appears at a g-factor of 2.003 in electron spin resonance spectroscopy.

8. The method for manufacturing a semiconductor device according to claim 5 , wherein the first gate insulating layer has fewer defects than the second gate insulating layer.

9. A method for manufacturing a semiconductor device, comprising:

forming a gate electrode over a substrate;

forming a first gate insulating layer including nitrogen after forming the gate electrode;

forming a second gate insulating layer after forming the first gate insulating layer;

forming an oxide semiconductor layer after forming the second gate insulating layer; and

forming a source electrode and a drain electrode electrically connected to the oxide semiconductor layer,

wherein a content of indium is higher than a content of gallium in the oxide semiconductor layer that is closer to the gate electrode, and a content of indium is lower than or equal to a content of gallium in the oxide semiconductor layer that is farther from the gate electrode.

10. The method for manufacturing a semiconductor device according to claim 9 , wherein the first gate insulating layer is formed by a mixed gas of silane, nitrogen and ammonia, and the second gate insulating layer is formed by a mixed gas of silane and nitrogen.

11. The method for manufacturing a semiconductor device according to claim 9 , wherein the first gate insulating layer has a spin density of 1×10 17 spins/cm 3 or less corresponding to a signal that appears at a g-factor of 2.003 in electron spin resonance spectroscopy.

12. The method for manufacturing a semiconductor device according to claim 9 , wherein the first gate insulating layer has fewer defects than the second gate insulating layer.

Priority Claims (2)
JP 2012-108929 · May 10, 2012 · national
JP 2012-125174 · May 31, 2012 · national
Continuity (3)
Continuation 14706282 · May 7, 2015
Continuation 13875507 · May 2, 2013
Related Publication 20160315178A1 · Oct 27, 2016