Remote direct non-volatile cache access
A system and method of providing direct data access between a non-volatile cache and a NIC in a computing system. A system is disclosed that includes a processing core embedded in a controller that controls a non-volatile cache; and a direct access manager for directing the processing core, wherein the direct access manager includes: a switch configuration system that includes logic to control a switch for either a remote direct access mode or a host access mode, wherein the switch couples each of the NIC, a local bus, and the non-volatile cache; a command processing system that includes logic to process data transfer commands; and a data transfer system that includes logic to manage the flow of data directly between the non-volatile cache and the NIC.
1. A system for providing direct data access between a non-volatile cache and a network interface card (NIC) in a computing system, comprising:
a processing core embedded in a controller that controls a non-volatile cache; and
a direct access manager for directing the processing core, wherein the direct access manager includes:
a switch configuration system that includes logic to control a switch for either a remote direct access mode or a host access mode, wherein the switch couples each of the NIC, a local bus, and the non-volatile cache;
a command processing system that includes logic to process data transfer commands; and
a data transfer system that includes logic to manage the flow of data directly between the non-volatile cache and the NIC.
2. The system of claim 1 , wherein the computing system utilizes a PCIe infrastructure and the controller comprises a PCIe controller card.
3. The system of claim 1 , wherein the processing core comprises a field programmable gate array (FPGA) device.
4. The system of claim 1 , wherein the computing system includes a host, host local memory and a PCIe root complex and wherein the direct access manager further includes an arbitrator that arbitrates and schedules data traffic flow through the switch.
5. The system of claim 4 , wherein the controller includes a direct memory access (DMA) engine for transferring data between the non-volatile cache and the host local memory in the host access mode.
6. The system of claim 1 , wherein the NIC is connected to an external network of storage systems.
7. The system of claim 1 , wherein the non-volatile cache comprises non-volatile RAM (random access memory).
8. A computing system, comprising:
a host having a local memory and PCIe root complex;
a bus that couples the host to a PCIe switch;
a network interface card (NIC) and a non-volatile cache coupled to the PCIe switch;
a remote direct access PCIe controller card coupled to the non-volatile cache that provides direct data access between the non-volatile cache and the NIC, wherein the remote direct access PCIe controller card includes:
a processing core;
a direct access manager for controlling the processing core, wherein the direct access manager includes:
a switch configuration system that includes logic to control the PCIe switch between a direct access mode and a host access mode;
a command processing system that includes logic to process data transfer commands; and
a data transfer system that includes logic to manage the flow of data directly between the non-volatile memory and the NIC; and
an arbitrator that schedules data traffic flow through the PCIe switch.
9. The computing system of claim 8 , wherein the processing core comprises a field programmable gate array (FPGA) device.
10. The computing system of claim 8 , wherein the direct access PCIe controller card includes a direct memory access (DMA) engine for transferring data between the non-volatile cache and the NIC.
11. The computing system of claim 8 , wherein the NIC is connected to an external network of storage systems.
12. The computing system of claim 8 , wherein the non-volatile cache comprises non-volatile RAM (random access memory).
13. A method of providing direct data access between a non-volatile cache system and a network interface card (NIC) in a computing system, wherein the computing system further includes a host, host local memory, a root complex and a switch, the method comprising:
providing a controller that is coupled to and controls a non-volatile cache;
receiving at the controller a command from the host to transfer data between the non-volatile cache and the NIC;
generating and sending a command from the controller to configure the switch to allow a direct data transfer between the non-volatile cache and NIC;
generating and sending a data transfer command from the controller to the NIC; and
implementing the data transfer directly through the switch between the non-volatile cache and the NIC.
14. The method of claim 13 , wherein the computing system utilizes a PCIe infrastructure and the controller includes a PCIe controller card.
15. The method of claim 13 , wherein the wherein the controller card includes a processing core implemented with a field programmable gate array (FPGA) device.
16. The method of claim 15 , wherein the controller card includes a direct memory access (DMA) engine for transferring data between the non-volatile cache and the host local memory.
17. The method of claim 13 , wherein the NIC is connected to an external network of storage systems.
18. The method of claim 17 , wherein the external network of storage systems includes storage device utilizing one of magnetic media and optical media.
19. The method of claim 13 , wherein the non-volatile cache comprises non-volatile RAM (random access memory).
20. The method of claim 13 , further comprising utilizing the controller to arbitrate traffic flow on the switch.