IP Library › Granted Patent US 9,852,926
Granted Patent B2
US 9,852,926 · App. 15/295,016 · Granted Dec 26, 2017

Manufacturing method for semiconductor device

Inventors: Kengo Akimoto (Isehara, JP); Yukinori Shima (Tatebayashi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L21/385H01L27/127H01L29/66969H01L29/7869
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Quick Facts
Patent No.
US 9,852,926
App. No.
15/295,016
Granted
Dec 26, 2017
Kind
B2
Abstract

A semiconductor device including an oxide conductor with high conductivity and high transmittance is provided. A manufacturing method for a semiconductor device includes the steps of: forming an oxide semiconductor over a first insulator; forming a second insulator over the first insulator and the oxide semiconductor; forming a first conductor over the second insulator; forming an etching mask over the first conductor; forming a second conductor including a region overlapping with the oxide semiconductor by etching the first conductor with use of the etching mask as a mask; removing the etching mask; and performing heat treatment after forming a hydrogen-containing layer over the second insulator and the second conductor.

Claims (68)

1. A method for manufacturing a semiconductor device, comprising:

forming an oxide semiconductor over a first insulator;

forming a second insulator over the first insulator and the oxide semiconductor;

forming a first conductor over the second insulator;

forming a second conductor including a region overlapping with the oxide semiconductor by processing the first conductor; and

performing heat treatment after forming a hydrogen-containing layer over the second insulator and the second conductor.

2. The method according to claim 1 , further comprising:

forming a third insulator in contact with a side surface of the second conductor before forming the hydrogen-containing layer.

3. The method according to claim 1 , further comprising:

adding an ion to the oxide semiconductor before forming the hydrogen-containing layer.

4. The method according to claim 1 , wherein the oxide semiconductor includes indium and zinc.

5. The method according to claim 1 , wherein the second insulator includes at least one of silicon oxide and silicon oxynitride.

6. The method according to claim 1 , wherein a hydrogen concentration of the hydrogen-containing layer measured by secondary ion mass spectrometry before the heat treatment is in a range of 1×10 21 atoms/cm 3 or higher and 5×10 22 atoms/cm 3 or lower.

7. The method according to claim 1 , wherein the hydrogen-containing layer includes at least one of amorphous silicon and a hydrogen compound of a metal.

8. A method for manufacturing a semiconductor device, comprising:

forming a first conductor over a first insulator;

forming a second insulator over the first insulator and the first conductor;

forming a first oxide semiconductor and a second oxide semiconductor over the second insulator;

forming a third insulator over the second insulator and the first oxide semiconductor;

forming a fourth insulator over the second oxide semiconductor and the third insulator; and

performing heat treatment after forming a hydrogen-containing layer over the fourth insulator.

9. The method according to claim 8 , further comprising:

adding an ion to the second oxide semiconductor before forming the hydrogen-containing layer.

10. The method according to claim 8 , further comprising:

removing the hydrogen-containing layer after the heat treatment;

forming a second conductor over the fourth insulator; and

forming a third conductor including a region overlapping with the second oxide semiconductor by processing the second conductor.

11. The method according to claim 8 , further comprising:

forming a fourth conductor including a region overlapping with the second oxide semiconductor by processing the hydrogen-containing layer.

12. The method according to claim 8 , wherein each of the first oxide semiconductor and the second oxide semiconductor includes indium and zinc.

13. The method according to claim 8 , wherein the third insulator has a function of blocking hydrogen.

14. The method according to claim 8 , wherein the fourth insulator includes at least one of silicon oxide and silicon oxynitride.

15. The method according to claim 8 , wherein a hydrogen concentration of the hydrogen-containing layer measured by secondary ion mass spectrometry before the heat treatment is in a range of 1×10 21 atoms/cm 3 or higher and 5×10 22 atoms/cm 3 or lower.

16. The method according to claim 8 , wherein the hydrogen-containing layer includes at least one of amorphous silicon and a hydrogen compound of a metal.

17. A method for manufacturing a semiconductor device, comprising:

forming an oxide semiconductor;

forming an insulator over the oxide semiconductor;

forming a conductor over the insulator, the conductor including a region overlapping with the oxide semiconductor;

forming a hydrogen-containing layer over the insulator and the conductor; and

performing heat treatment on the hydrogen-containing layer at a temperature in a range of 150° C. or higher and 450° C. or lower.

18. The method according to claim 17 , further comprising:

forming a second insulator in contact with a side surface of the conductor before forming the hydrogen-containing layer.

19. The method according to claim 17 , further comprising:

adding an ion to the oxide semiconductor before forming the hydrogen-containing layer.

20. The method according to claim 17 , wherein the oxide semiconductor includes indium and zinc.

21. The method according to claim 17 , wherein the insulator includes at least one of silicon oxide and silicon oxynitride.

22. The method according to claim 17 , wherein a hydrogen concentration of the hydrogen-containing layer measured by secondary ion mass spectrometry before the heat treatment is in a range of 1×10 21 atoms/cm 3 or higher and 5×10 22 atoms/cm 3 or lower.

23. The method according to claim 17 , wherein the hydrogen-containing layer includes at least one of amorphous silicon and a hydrogen compound of a metal.

24. A method for manufacturing a semiconductor device, comprising:

forming a first conductor;

forming a first insulator over the first conductor;

forming a first oxide semiconductor and a second oxide semiconductor over the first insulator;

forming a second insulator over the first insulator and the first oxide semiconductor;

forming a third insulator over the second oxide semiconductor and the second insulator;

forming a hydrogen-containing layer over the third insulator; and

performing heat treatment on the hydrogen-containing layer at a temperature in a range of 150° C. or higher and 450° C. or lower.

25. The method according to claim 24 , further comprising:

adding an ion to the second oxide semiconductor before forming the hydrogen-containing layer.

26. The method according to claim 24 , further comprising:

removing the hydrogen-containing layer after the heat treatment; and

forming a second conductor over the third insulator, the second conductor including a region overlapping with the second oxide semiconductor.

27. The method according to claim 24 , further comprising:

forming a third conductor including a region overlapping with the second oxide semiconductor by processing the hydrogen-containing layer.

28. The method according to claim 24 , wherein each of the first oxide semiconductor and the second oxide semiconductor includes indium and zinc.

29. The method according to claim 24 , wherein the second insulator has a function of blocking hydrogen.

30. The method according to claim 24 , wherein the third insulator includes at least one of silicon oxide and silicon oxynitride.

31. The method according to claim 24 , wherein a hydrogen concentration of the hydrogen-containing layer measured by secondary ion mass spectrometry before the heat treatment is in a range of 1×10 21 atoms/cm 3 or higher and 5×10 22 atoms/cm 3 or lower.

32. The method according to claim 24 , wherein the hydrogen-containing layer includes at least one of amorphous silicon and a hydrogen compound of a metal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2016
From: AKIMOTO, KENGO; SHIMA, YUKINORI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 040302/0686 →
Priority Claims (1)
JP 2015-206186 · Oct 20, 2015 · national
Continuity (1)
Related Publication 20170110337A1 · Apr 20, 2017