Power density matching for power amplifiers
Circuits and methods related to power amplifiers. In some implementations, a bias circuit includes a reference device connectable to receive a first electrical supply level, the reference device arranged to produce an electrical bias condition using the first electrical supply level, and the reference device connectable to provide the electrical bias condition to an amplifier device connectable to a second electrical supply level. The bias circuit also includes a power density translating circuit connectable between the reference device and the amplifier device, the power density matching circuit provided to substantially set a first power density associated with the reference device and a second power density associated with the amplifier device relative to one another, the first power density being a function of the first electrical supply level and the second power density being a function of the second electrical supply level.
1. A bias circuit comprising:
a reference device connectable to receive a first electrical supply level, the reference device arranged to produce an electrical bias condition using the first electrical supply level, and the reference device connectable to provide the electrical bias condition to an amplifier device, the amplifier device connectable to a second electrical supply level, the second electrical supply level distinct from the first electrical supply level; and
a power density matching circuit connectable between the reference device and the amplifier device, the power density matching circuit provided to substantially set a first power density associated with a first transistor included in the reference device and a second power density associated with a second transistor included in the amplifier device relative to one another, the first power density being a function of the first electrical supply level and the second power density being a function of the second electrical supply level, the power density matching circuit comprising at least one transistor with a base terminal coupled to the first electrical supply level.
2. The bias circuit of claim 1 wherein at least one of the reference device and the amplifier device includes one of a BJT, a MOSFET, a HBT, a MESFET, and a GaAsFET.
3. The bias circuit of claim 1 wherein the first electrical supply level is a first voltage level that is less than a second voltage level corresponding to the second electrical supply level.
4. The bias circuit of claim 1 wherein the power density matching circuit includes a current translator circuit.
5. The bias circuit of claim 4 wherein the current translator circuit includes a combination of transistors that are each sized relative to one another in order to set a current density in the amplifier relative to a current density in the reference device.
6. The bias circuit of claim 4 wherein the current translator circuit includes portions of at least two current mirror arrangements of transistors.
7. The bias circuit of claim 4 wherein the current translator circuit operation is substantially independent of temperature.
8. A module comprising:
a packaging substrate configured to receive a plurality of components;
a reference device connectable to receive a first electrical supply level, the reference device arranged to produce an electrical bias condition using the first electrical supply level, and the reference device connectable to provide the electrical bias condition to an amplifier device connectable to a second electrical supply level, the amplifier device connectable to a second electrical supply level, the second electrical supply level distinct from the first electrical supply level, and at least a portion of the reference device is included on the packaging substrate; and
a power density matching circuit connectable between the reference device and the amplifier device, the power density matching circuit provided to substantially set a first power density associated with a first transistor included in the reference device and a second power density associated with a second transistor included in the amplifier device relative to one another, the first power density being a function of the first electrical supply level and the second power density being a function of the second electrical supply level, the power density matching circuit comprising at least one transistor with a base terminal coupled to the first electrical supply level and at least a portion of the power density matching circuit is included on the packaging substrate.
9. The module of claim 8 wherein at least a portion of the power density matching circuit is included on a first die.
10. The module of claim 8 wherein the first electrical supply level is a first voltage level that is less than a second voltage level corresponding to the second electrical supply level.
11. The module of claim 8 wherein the power density matching circuit includes a current translator circuit.
12. The module of claim 11 wherein the current translator circuit includes a combination of transistors that are each sized relative to one another in order to set a current density in the amplifier relative to a current density in the reference device.
13. The module of claim 11 wherein the current translator circuit includes portions of at least two current mirror arrangements of transistors.
14. A radio-frequency (RF) device comprising:
a transceiver configured to process RF signals;
an antenna in communication with the transceiver configured to facilitate transmission of an amplified RF signal;
a power amplifier connected to the transceiver and configured to generate the amplified RF signal; and
a bias module including:
a reference device connectable to receive a first electrical supply level, the reference device arranged to produce an electrical bias condition using the first electrical supply level, and the reference device connectable to provide the electrical bias condition to power amplifier connectable to a second electrical supply level, the amplifier device connectable to a second electrical supply level, the second electrical supply level distinct from the first electrical supply level; and
a power density matching circuit connectable between the reference device and the power amplifier, the power density matching circuit provided to substantially set a first power density associated with a first transistor included in the reference device and a second power density associated with a second transistor included in the amplifier device relative to one another, the first power density being a function of the first electrical supply level and the second power density being a function of the second electrical supply level, the power density matching circuit comprising at least one transistor with a base terminal coupled to the first electrical supply level.
15. The RF device of claim 14 wherein the RF device includes a wireless device.
16. The RF device of claim 14 wherein the wireless device includes at least one of a base station, a repeater, a cellular phone, a smartphone, a computer, a laptop, a tablet computer, and peripheral device.
17. The RF device of claim 14 wherein the power density matching circuit includes a current translator circuit.
18. The RF device of claim 17 the current translator circuit includes a combination of transistors that are each sized relative to one another in order to set a current density in the amplifier relative to a current density in the reference device.