Semiconductor device including electrostatic discharge circuit and operation method thereof
A semiconductor device includes a first driver configured to pull up a voltage level of a pad to a first power voltage in response to a driving signal, a second driver configured to pull down the voltage level of the pad to a second power voltage in response to the driving signal, a switch protection resistor configured to change an electrical resistance between the pad and the second driver in response to a switch control signal, and an ESD detector configured to detect a voltage level of the first or second power voltage and generate the switch control signal.
1. A semiconductor device, comprising:
a first driver configured to pull up a voltage level of a pad to a first power voltage in response to a driving signal;
a second driver configured to pull down the voltage level of the pad to a second power voltage in response to the driving signal;
a switch protection resistor configured to change a resistance between the pad and the second driver in response to a switch control signal; and
an electrostatic discharge (ESD) detector configured to detect a voltage level of the first or second power voltage and generate the switch control signal.
2. The semiconductor device of claim 1 , wherein the switch protection resistor comprises:
a protection resistor connected between the pad and the second driver; and
a switch transistor connected in parallel to the protection resistor and forming a current path bypassing the protection resistor in accordance with the switch control signal.
3. The semiconductor device of claim 2 , wherein the switch transistor comprises an n-channel metal-oxide-semiconductor (NMOS) transistor.
4. The semiconductor device of claim 2 , wherein the ESD detector is configured to generate the switch control signal having a first voltage level that causes the switch transistor to turn off in response to the first power voltage being higher than a reference voltage value.
5. The semiconductor device of claim 4 , wherein the ESD detector is configured to generate the switch control signal having a second voltage level that causes the switch transistor to turn on in response to the first power voltage being lower than the reference voltage value.
6. The semiconductor device of claim 2 , wherein the ESD detector comprises a high pass filter configured to generate the switch control signal in response to an alternating current (AC) component of the first power voltage.
7. The semiconductor device of claim 6 , wherein the ESD detector comprises:
a resistor-capacitor (RC) circuit configured to allow the AC component of the first power voltage to pass therethrough; and
an NMOS transistor configured to allow the switch control signal to have one of the first and second power voltages in accordance with a level of the AC component.
8. The semiconductor device of claim 2 , wherein the ESD detector comprises a low pass filter configured to generate the switch control signal in response to a direct current (DC) component of the first power voltage.
9. The semiconductor device of claim 8 , wherein the ESD detector comprises:
an RC circuit configured to delay an AC component of the first power voltage for a specific duration; and
a p-channel metal-oxide-semiconductor (PMOS) transistor and an inverter configured to pass through the switch control signal having a voltage level that causes the switch transistor to turn off for the specific duration.
10. The semiconductor device of claim 1 , wherein the first driver comprises at least one PMOS transistor configured to pull up the voltage level of the pad to the first power voltage in response to the driving signal, and
the second driver comprises at least one NMOS transistor configured to pull down the voltage level of the pad to the second power voltage in response to the driving signal.
11. The semiconductor device of claim 1 , wherein the switch protection resistor comprises:
a protection resistor connected between the pad and a common drain shared by a PMOS transistor of the first driver and an NMOS transistor of the second driver; and
a switch transistor connected in parallel to the protection resistor and forming a current path bypassing the protection resistor in accordance with the switch control signal.
12. The semiconductor device of claim 1 , wherein the switch protection resistor comprises:
a first protection resistor connected to the pad;
a second protection resistor connected between the first protection resistor and the first driver; and
a switch transistor connected in parallel to the first protection resistor and forming a current path bypassing the first protection resistor in accordance with the switch control signal.
13. The semiconductor device of claim 1 , wherein the switch protection resistor is configured to vary a resistance property that is adjusted by the switch control signal.
14. A semiconductor device, comprising:
a driver configured to drive a pad with a first power voltage or a second power voltage in accordance with a driving signal;
a switch protection resistor configured to form one of a first current path and a second current path between the pad and the driver in accordance with a switch control signal,
wherein the first current path passes through a protection resistor and the second current path bypasses the protection resistor; and
an electrostatic discharge (ESD) detector configured to monitor the first or second power voltage and generate the switch control signal,
wherein the first current path is formed in response to an occurrence of an ESD event.
15. The semiconductor device of claim 14 , wherein the second current path is formed in response to the first or second power voltage being lower than a reference voltage value.
16. The semiconductor device of claim 14 , wherein the switch protection resistor comprises:
a protection resistor connected between the pad and the driver; and
a switch transistor connected in parallel to the protection resistor and forming the second current path.
17. The semiconductor device of claim 14 , wherein the driver comprises:
an n-channel metal-oxide-semiconductor (NMOS) transistor configured to pull down a voltage level of the pad to the second power voltage in response to the driving signal.
18. The semiconductor device of claim 14 , wherein the ESD detector comprises:
a high pass filter configured to filter an alternating current (AC) component of the first power voltage and provide the resulting filtered AC component to the switch control signal.
19. The semiconductor device of claim 14 , wherein the ESD detector comprises:
a low pass filter configured to filter a direct current (DC) component of the first power voltage, invert the resulting filtered DC component, and provide the resulting inverted DC component to the switch control signal.
20. The semiconductor device of claim 14 , wherein the second power voltage is a ground or a negative voltage.