IP Library Granted Patent US 9,876,011
Granted Patent B2
US 9,876,011 · App. 15/256,938 · Granted Jan 23, 2018

Semiconductor device

Inventors: Kenichi Matsushita (Nonoichi Ishikawa, JP); Kazutoshi Nakamura (Nonoichi Ishikawa, JP)
Assignee: Kabushiki Kaisha Toshiba
H01L27/0664H01L29/1095H01L29/401H01L29/407H01L29/408H01L29/66143H01L29/66348H01L29/7397H01L29/872
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Quick Facts
Patent No.
US 9,876,011
App. No.
15/256,938
Granted
Jan 23, 2018
Kind
B2
Abstract

A semiconductor device comprising: a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type provided on the first semiconductor region; an insulating portion provided on the first semiconductor region; a third semiconductor region of the second conductivity type provided on the second semiconductor region and having a higher carrier concentration of the second conductivity type than that of the second semiconductor region; and a first electrode provided on the insulating portion and the third semiconductor region, the first electrode having a portion which is aligned with the second semiconductor region in a second direction perpendicular to a first direction being from the first semiconductor region to the second semiconductor region, and the first electrode being in contact with the second semiconductor region and the third semiconductor region.

Claims (60)

1. A semiconductor device comprising:

a first semiconductor region of a first conductivity type;

a second semiconductor region of a second conductivity type provided on the first semiconductor region;

an insulating portion provided on the first semiconductor region;

a third semiconductor region of the second conductivity type provided on the second semiconductor region and having a higher carrier concentration of the second conductivity type than that of the second semiconductor region; and

a first electrode provided on the insulating portion and the third semiconductor region, the first electrode having a portion which is aligned with the second semiconductor region in a second direction perpendicular to a first direction being from the first semiconductor region to the second semiconductor region, and the first electrode being in contact with the second semiconductor region and the third semiconductor region,

wherein

a part of the second semiconductor region is provided between the first semiconductor region and the insulating portion in the first direction.

2. The semiconductor device, according to claim 1 , further comprising:

a conductive portion surrounded by the insulating portion.

3. The semiconductor device, according to claim 2 , wherein

the conductive portion is electrically connected to the first electrode.

4. The semiconductor device, according to claim 1 , wherein

a contact surface between the second semiconductor region and the first electrode is inclined in relation to the first direction.

5. The semiconductor device, according to claim 1 , wherein

the third semiconductor region extends in a direction perpendicular to the first direction.

6. The semiconductor device, according to claim 1 , wherein

a plurality of the third semiconductor regions is provided in two directions perpendicular to the first direction.

7. The semiconductor device, according to claim 1 , wherein

the first electrode is in schottky contact with the second semiconductor region and is in ohmic contact with the third semiconductor region.

8. A semiconductor device comprising:

a first semiconductor region of a first conductivity type;

a second semiconductor region of a second conductivity type provided on the first semiconductor region;

an insulating portion provided on the first semiconductor region;

a third semiconductor region of the second conductivity type provided on the second semiconductor region and having a higher carrier concentration of the second conductivity type than that of the second semiconductor region;

a first electrode provided on the insulating portion and the third semiconductor region, the first electrode having a portion which is aligned with the second semiconductor region in a second direction perpendicular to a first direction being from the first semiconductor region to the second semiconductor region, and the first electrode being in contact with the second semiconductor region and the third semiconductor region; and

a conductive portion surrounded by the insulating portion,

wherein

a part of the second semiconductor region is provided between the first semiconductor region and the insulating portion in the first direction.

9. The semiconductor device, according to claim 8 , wherein

a contact surface between the second semiconductor region and the first electrode is inclined in relation to the first direction.

10. The semiconductor device, according to claim 8 , wherein

the first electrode is in schottky contact with the second semiconductor region and is in ohmic contact with the third semiconductor region.

11. A semiconductor device comprising:

a second electrode;

a fourth semiconductor region of a first conductivity type provided on the second electrode;

a fifth semiconductor region of a second conductivity type provided on the second electrode;

a first semiconductor region of the first conductivity type provided above the fourth semiconductor region and the fifth semiconductor region;

a second semiconductor region of the second conductivity type provided on a part of the first semiconductor region and located above the fourth semiconductor region;

an insulating portion provided on another part of the first semiconductor region and located above the fourth semiconductor region;

a third semiconductor region of the second conductivity type provided on the second semiconductor region and having a higher carrier concentration of the second conductivity type than the second semiconductor region;

a sixth semiconductor region of the second conductivity type provided on the first semiconductor region, separated from the second semiconductor region and the insulating portion, and located above the fifth semiconductor region;

a seventh semiconductor region of the first conductivity type selectively provided on the sixth semiconductor region;

a gate electrode;

a gate insulating layer provided between the gate electrode and each of the first semiconductor region, the sixth semiconductor region, and the seventh semiconductor region; and

a first electrode provided on the insulating portion, the third semiconductor region, and the seventh semiconductor region, the first electrode having a portion aligned with the second semiconductor region in a second direction perpendicular to a first direction being from the first semiconductor region to the second semiconductor region, and the first electrode being in contact with the second semiconductor region, the third semiconductor region, and the seventh semiconductor region.

12. The semiconductor device, according to any of claim 11 , wherein

the first electrode is in shotkey contact with the second semiconductor region and is in ohmic contact with the third semiconductor region.

13. The semiconductor device, according to claim 11 , further comprising:

a conductive portion surrounded by the insulating portion.

14. The semiconductor device, according to claim 13 , wherein

the conductive portion is electrically connected to the first electrode.

15. The semiconductor device, according to claim 11 , wherein

a contact surface between the second semiconductor region and the first electrode is inclined in relation to the first direction.

16. The semiconductor device, according to claim 11 , wherein

a part of the second semiconductor region is provided between the first semiconductor region and the insulating portion in the first direction.

17. The semiconductor device, according to claim 11 , wherein

the third semiconductor region extends in a direction perpendicular to the first direction.

18. The semiconductor device, according to claim 11 , wherein

a plurality of the third semiconductor regions is provided in two directions perpendicular to the first direction.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2016
From: MATSUSHITA, KENICHI; NAKAMURA, KAZUTOSHI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 039636/0278 →
Priority Claims (1)
JP 2015-227661 · Nov 20, 2015 · national
Continuity (1)
Related Publication 20170148786A1 · May 25, 2017