IP Library › Granted Patent US 9,882,026
Granted Patent B2
US 9,882,026 · App. 14/993,935 · Granted Jan 30, 2018

Method for forming a nanowire structure

Inventors: Kandabara N. Tapily (Albany, NY); Genji Nakamura (Kai, JP)
Assignee: Tokyo Electron Limited
H01L29/66772H01L29/0673H01L29/42392H01L29/78618H01L29/78654H01L29/78696
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,882,026
App. No.
14/993,935
Granted
Jan 30, 2018
Kind
B2
Abstract

Embodiments of the invention describe a method for forming a nanowire structure on a substrate. According to one embodiment, the method includes a) depositing a first semiconductor layer on the substrate, b) etching the first semiconductor layer to form a patterned first semiconductor layer, c) forming a dielectric layer across the patterned first semiconductor layer, and d) depositing a second semiconductor layer on the patterned first semiconductor layer and on the dielectric layer. The method further includes e) repeating a)-d) at least once, f) following e), repeating a)-c) once, g) etching the patterned first semiconductor layers, the dielectric layers, and the second semiconductor layers to form a fin structure, and h) removing the patterned first semiconductor layers from the fin structure.

Claims (46)

1. A method of forming a nanowire structure on a substrate, the method comprising:

a) depositing a first semiconductor layer on the substrate;

b) etching the first semiconductor layer to form a patterned first semiconductor layer;

c) forming a dielectric layer adjacent to the patterned first semiconductor layer;

d) depositing a second semiconductor layer on the patterned first semiconductor layer and on the dielectric layer after forming the dielectric layer;

e) repeating a)-d) at least once;

f) following e), repeating a)-c) once;

g) etching the patterned first semiconductor layers, the dielectric layers, and the second semiconductor layers to form a fin structure; and

h) removing the patterned first semiconductor layers from the fin structure.

2. The method of claim 1 , wherein removing the patterned first semiconductor layers forms nanowires of the second semiconductor layers that are separated from each other by a gap.

3. The method of claim 2 , further comprising forming a gate dielectric layer around the nanowires.

4. The method of claim 3 , further comprising forming a gate electrode layer around the gate dielectric layer.

5. The method of claim 1 , wherein the first and second semiconductor layers are epitaxial layers.

6. The method of claim 1 , wherein the material of the patterned first semiconductor layers and the material of the second semiconductor layers are different and are selected from the group consisting of Si, SiGe, Ge, and compound semiconductors.

7. The method of claim 1 , wherein the patterned first semiconductor layers contain epitaxial silicon and the second semiconductor layers contain epitaxial silicon germanium.

8. The method of claim 1 , wherein the patterned first semiconductor layers contain epitaxial silicon germanium and the second semiconductor layers contain epitaxial silicon.

9. The method of claim 1 , wherein b) includes

forming a patterned film on the first semiconductor layer; and

etching the first semiconductor layer according to the patterned film.

10. The method of claim 9 , wherein c) includes

selectively growing the dielectric layer as an epitaxial layer on the substrate but not on the patterned film.

11. The method of claim 9 , wherein c) includes

growing the dielectric layer as an epitaxial layer on the substrate and as a non-epitaxial layer on the patterned film; and

removing the non-epitaxial layer from the patterned film.

12. The method of claim 1 , wherein the dielectric layer includes an epitaxial oxide.

13. The method of claim 12 , wherein the epitaxial oxide is selected from the group consisting of SiO 2 and a metal oxide.

14. The method of claim 13 , wherein the metal oxide is selected from the group consisting of Gd 2 O 3 , CeO 2 , and La 2 O 3 .

15. A method of forming a nanowire structure on a substrate, the method comprising:

a) depositing a SiGe layer on the substrate;

b) etching the SiGe layer to form a patterned SiGe layer;

c) forming an oxide layer adjacent to the patterned SiGe layer;

d) depositing a Si layer on the patterned SiGe layer and on the oxide layer after forming the oxide layer;

e) repeating a)-d) at least once;

following e), repeating a)-c) once;

g) etching the patterned SiGe layers, the oxide layers, and the Si layers to form a fin structure; and

h) removing the patterned SiGe layers from the fin structure, wherein the patterned SiGe layers are removed from the fin structure to form Si nanowires that are separated from each other by a gap.

16. The method of claim 15 , further comprising forming a gate dielectric layer around the Si nanowires, and forming a gate electrode layer around the gate dielectric layer.

17. The method of claim 15 , wherein b) includes

forming a patterned film on the SiGe layer; and

etching the SiGe layer according to the patterned film.

18. The method of claim 17 , wherein c) includes

selectively growing the oxide layer as an epitaxial layer on the substrate but not on the patterned film.

19. The method of claim 17 , wherein c) includes

growing the oxide layer as an epitaxial layer on the substrate and as a non-epitaxial layer on the patterned film; and

removing the non-epitaxial layer from the patterned film.

20. The method of claim 15 , wherein the oxide layer includes an epitaxial oxide selected from the group consisting of SiO 2 and a metal oxide.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 3, 2016
From: TAPILY, KANDABARA N.; NAKAMURA, GENJI
To: TOKYO ELECTRON LIMITED
Reel/Frame 037659/0990 →
Continuity (2)
Provisional Application 62102735 · Jan 13, 2015
Related Publication 20160204228A1 · Jul 14, 2016