IP Library Granted Patent US 9,887,635
Granted Patent B2
US 9,887,635 · App. 14/845,139 · Granted Feb 6, 2018

Double-ended forward converter and power supply device

Inventors: Yu Yonezawa (Sagamihara, JP); Yoshiyasu Nakashima (Kawasaki, JP)
Assignee: FUJITSU LIMITED
H02M3/3376H02M3/3378H02M1/08H02M3/3353H03K17/61H03K17/691Y02B70/1483
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Quick Facts
Patent No.
US 9,887,635
App. No.
14/845,139
Granted
Feb 6, 2018
Kind
B2
Abstract

A double-ended forward converter includes: a first switching element and a second switching element that are coupled to a primary side of a transformer; a pulse generation circuit that generates a pulse signal for controlling the first and second switching elements; an isolation transformer that converts the pulse signal into an alternating-current signal; a rectifier circuit that rectifies the alternating-current signal and generate gate voltages of the first and second switching elements; a driver circuit that includes a third switching element which drives gates of the first and second switching elements, a voltage generated on a secondary side of the isolation transformer being input to a gate of the third switching element; and a minus bias generation circuit that generates a source voltage of the third switching, based on a change in the voltage generated on the secondary side of the isolation transformer.

Claims (26)

1. A double-ended forward converter comprising:

a first GaN-HEMT and a second GaN-HEMT that are coupled to a primary side of a transformer;

a pulse generation circuit that generates a PWM signal;

a first isolation transformer that converts the PWM signal into a first signal for controlling the first GaN-HEMT;

a second isolation transformer that converts the PWM signal into a second signal for controlling the second GaN-HEMT;

a first half-wave voltage doubler rectifier circuit that generates first given voltages which does not depend on a duty cycle of the PWM signal;

a second half-wave voltage doubler rectifier circuit that generates second given voltages which does not depend on the duty cycle of the PWM signal;

a first driver circuit includes a first gate driver that supplies the first given voltages to a gate of the first GaN-HEMT and includes a first transistor that controls the first gate driver;

a first minus bias generation circuit that generates a first minus voltage supplied to a source of the first transistor so as to a source voltage is equal to a gate voltage of the first transistor:

a second driver circuit includes a second gate driver that supplies the second given voltages to a gate of the second GaN-HEMT; and

a second minus bias generation circuit that generates a second minus voltage supplied to a source of the second transistor so as to a source voltage is equal to a gate voltage of the second transistor.

2. A power supply device comprising:

an alternating-current power source;

a rectifier circuit that rectifies a current of the alternating-current power source;

a power factor correction circuit that smooths the rectified current and generate a first direct-current voltage; and

a DC-DC converter that generates a second direct-current voltage from the first direct-current voltage, wherein the DC-DC converter includes:

a first GaN-HEMT and a second GaN-HEMT that are coupled to a primary side of a transformer;

a pulse generation circuit that generates a PWM signal;

a first isolation transformer that converts the PWM signal into a first signal for controlling the first GaN-HEMT;

a second isolation transformer that converts the PWM signal into a second signal for controlling the second GaN-HEMT;

a first half-wave voltage doubler rectifier circuit that generates first given voltages which does not depend on a duty cycle of the PWM signal;

a second half-wave voltage doubler rectifier circuit that generates second given voltages which does not depend on the duty cycle of the PWM signal;

a first driver circuit includes a first gate driver that supplies the first given voltages to a gate of the first GaN-HEMT and includes a first transistor that controls the first gate driver;

a first minus bias generation circuit that generates a first minus voltage supplied to a source of the first transistor so as to a source voltage is equal to a gate voltage of the first transistor:

a second driver circuit includes a second gate driver that supplies the second given voltages to a gate of the second GaN-HEMT; and

a second minus bias generation circuit that generates a second minus voltage supplied to a source of the second transistor so as to a source voltage is equal to a gate voltage of the second transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2015
From: YONEZAWA, YU; NAKASHIMA, YOSHIYASU
To: FUJITSU LIMITED
Reel/Frame 036495/0841 →
Continuity (2)
Continuation PCTJP2013001975 · Mar 22, 2013
Related Publication 20150381065A1 · Dec 31, 2015