IP Library Granted Patent US 9,892,785
Granted Patent B2
US 9,892,785 · App. 15/442,594 · Granted Feb 13, 2018

Multistage set procedure for phase change memory

Inventors: Sanjay Rangan (Boise, ID); Kiran Pangal (Fremont, CA); Nevil N Gajera (Meridian, ID); Lu Liu (Boise, ID); Gayathri Rao Subbu (Mountain View, CA)
Assignee: Intel Corporation
G11C13/0069G11C13/0004H01L45/06H01L45/1286H01L45/141G11C2013/008G11C2013/0078
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Quick Facts
Patent No.
US 9,892,785
App. No.
15/442,594
Granted
Feb 13, 2018
Kind
B2
Abstract

Phase change material can be set with a multistage set process. Set control logic can heat a phase change semiconductor material (PM) to a first temperature for a first period of time. The first temperature is configured to promote nucleation of a crystalline state of the PM. The control logic can increase the temperature to a second temperature for a second period of time. The second temperature is configured to promote crystal growth within the PM. The nucleation and growth of the crystal set the PM to the crystalline state. The multistage ramping up of the temperature can improve the efficiency of the set process relative to traditional approaches.

Claims (33)

1. A circuit to set a chalcogenide material, comprising:

a source to provide energy to heat a phase change chalcogenide material (PM); and

a control circuit to control energy output of the source, including to apply an initial energy pulse to amorphize the PM, reduce energy intensity from the initial energy pulse to a nucleation level of intensity, and increase from the nucleation level of intensity to a crystal growth level of intensity higher than the nucleation level of intensity and lower than the initial energy pulse.

2. The circuit of claim 1 , wherein the source comprises a current source, and wherein the control circuit comprises a circuit coupled to the PM to control an amount of current passing through the PM.

3. The circuit of claim 1 , wherein the source comprises a laser light source, and wherein the control circuit comprises a circuit to control an intensity of laser light directed to the PM.

4. The circuit of claim 1 , wherein nucleation level includes a first nucleation level and a second nucleation level higher than the first nucleation level, wherein the control circuit is to apply the first nucleation level of intensity for a first sub-period of time and apply the second nucleation level of intensity for a second sub-period of time.

5. The circuit of claim 1 , further comprising the control circuit to decrease from the crystal growth level of intensity to an annealing level of intensity to anneal disturbance in a crystalline structure of the PM.

6. The circuit of claim 5 , wherein the control circuit is to apply the nucleation level of intensity for a first period of time, and apply the annealing level of intensity for a second period of time.

7. The circuit of claim 1 , wherein the PM includes a storage cell of a phase change memory (PCM).

8. A system to implement a phase change set, comprising:

a phase-change dynamic random access memory (PRAM) including a phase change material (PM);

a source to provide energy to heat the PM;

a control circuit to control energy output of the source, including to apply an initial energy pulse to amorphize the PM, reduce energy intensity from the initial energy pulse to a nucleation level of intensity, and increase from the nucleation level of intensity to a crystal growth level of intensity higher than the nucleation level of intensity and lower than the initial energy pulse; and

a processor coupled to the PRAM to exchange data with the PRAM.

9. The system of claim 8 , wherein the source comprises a current source, and wherein the control circuit comprises a circuit coupled to the PM to control an amount of current passing through the PM.

10. The system of claim 8 , wherein the source comprises a laser light source, and wherein the control circuit comprises a circuit to control an intensity of laser light directed to the PM.

11. The system of claim 8 , wherein nucleation level includes a first nucleation level and a second nucleation level higher than the first nucleation level, wherein the control circuit is to apply the first nucleation level of intensity for a first sub-period of time and apply the second nucleation level of intensity for a second sub-period of time.

12. The system of claim 8 , further comprising the control circuit to decrease from the crystal growth level of intensity to an annealing level of intensity to anneal disturbance in a crystalline structure of the PM.

13. The system of claim 12 , wherein the control circuit is to apply the nucleation level of intensity for a first period of time, and apply the annealing level of intensity for a second period of time.

14. The system of claim 8 , wherein the PM includes a storage cell of a phase change memory (PCM).

15. The system of claim 8 , further comprising one or more of:

a memory controller integrated on the processor;

a display communicatively coupled to the processor;

a battery to power the system; or

a network interface communicatively coupled to the processor.

16. A method in a phase change semiconductor material, comprising:

applying an initial energy pulse from a source to amorphize a phase change semiconductor material (PM);

reducing energy intensity from the initial energy pulse to a nucleation level of intensity; and

increasing from the nucleation level of intensity to a crystal growth level of intensity higher than the nucleation level of intensity and lower than the initial energy pulse.

17. The method of claim 16 , wherein applying the initial energy pulse from the source comprises controlling an amount of current passing through the PM.

18. The method of claim 16 , wherein applying the initial energy pulse from the source comprises controlling an intensity of laser light directed to the PM.

19. The method of claim 16 , wherein nucleation level includes a first nucleation level and a second nucleation level higher than the first nucleation level, wherein reducing the energy intensity to the nucleation level of intensity comprises reducing to the first nucleation level of intensity for a first sub-period of time, and further comprising increasing from the first nucleation level of intensity to the second nucleation level of intensity for a second sub-period of time.

20. The method of claim 16 , further comprising decreasing from the crystal growth level of intensity to an annealing level of intensity to anneal disturbance in a crystalline structure of the PM.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2017
From: RANGAN, SANJAY; PANGAL, KIRAN; GAJERA, NEVIL N.; LIU, LU; SUBBU, GAYATHRI RAO
To: INTEL CORPORATION
Reel/Frame 042546/0905 →
Continuity (2)
Continuation 14672130 · Mar 28, 2015
Related Publication 20170169886A1 · Jun 15, 2017