IP Library Granted Patent US 9,898,021
Granted Patent B2
US 9,898,021 · App. 15/367,677 · Granted Feb 20, 2018

Dual-mode regulator circuit

Inventor: Chung-Ming Hsieh (Hsinchu, TW)
Assignee: Nuvoton Technology Corporation
G05F1/56H02M3/155H02M3/158H02M3/1584
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Quick Facts
Patent No.
US 9,898,021
App. No.
15/367,677
Granted
Feb 20, 2018
Kind
B2
Abstract

The present disclosure illustrates a dual-mode regulator circuit comprising: a first output terminal; a second output terminal; a switching regulator circuit coupled to the first output terminal and comprising a first transistor coupled between the first output terminal and ground; a linear regulator circuit coupled to the second output terminal and comprising a second transistor coupled between the second output terminal and a power source; a detection circuit configured to turn on the first transistor in order to connect the first output terminal to ground, turn on the second transistor in order to connect the second output terminal to the power source, and then generate a detection signal indicating whether an inductor is connected between the first and second output terminals; and a logic circuit configured to activate the switching regulator circuit or the linear regulator circuit according to the detection signal.

Claims (17)

1. A dual-mode regulator circuit, comprising:

a first output terminal;

a second output terminal;

a switching regulator circuit, coupled to the first output terminal, and comprising a first transistor coupled between the first output terminal and ground;

a linear regulator circuit, coupled to the second output terminal, and comprising a second transistor coupled between the second output terminal and a power source;

a detection circuit, configured to turn on the first transistor in order to connect the first output terminal to ground, turn on the second transistor in order to connect the second output terminal to the power source, then generate a detection signal indicating whether an inductor is connected between the first and second output terminals, and then activate the switching regulator circuit or the linear regulator circuit according to the detection signal.

2. The dual-mode regulator circuit according to claim 1 , wherein the detection circuit comprises:

a comparator, comprising a first input terminal coupled to the first output terminal, and a second input terminal configured to receive a reference voltage or a voltage of the second output terminal; and

a logic circuit, coupled to the comparator, the switching regulator circuit and the linear regulator circuit;

wherein when a voltage of the first input terminal is lower than a voltage of the second input terminal, the comparator outputs the detection signal indicating that no inductor is connected between the first output terminal and the second output terminal, and then the logic circuit activates the linear regulator circuit to output voltage to the second output terminal according to the detection signal.

3. The dual-mode regulator circuit according to claim 2 , wherein when the voltage of the first input terminal is not lower than the voltage of the second input terminal, the comparator outputs the detection signal indicating that the inductor is connected between the first output terminal and the second output terminal, and then the logic circuit activates the switching regulator circuit to output voltage to the second output terminal via the inductor according to the detection signal.

4. The dual-mode regulator circuit according to claim 2 , wherein the switching regulator circuit further comprises a third transistor connected between the power source and the first output terminal.

5. The dual-mode regulator circuit according to claim 4 , wherein the first transistor is an n-channel transistor, and the second and third transistors are p-channel transistors.

6. The dual-mode regulator circuit according to claim 5 , wherein when the first output terminal and the second output terminal are disconnected, then the logic circuit activates the linear regulator circuit to output voltage to the second output terminal.

7. The dual-mode regulator circuit according to claim 4 , further comprising a selection circuit coupled between the second transistor and the third transistor and comprising a control terminal coupled to the logic circuit, and when the linear regulator circuit is activated to output voltage, the logic circuit controls the selection circuit in order to connect the second transistor and the third transistor in parallel.

8. The dual-mode regulator circuit according to claim 7 , wherein the selection circuit comprises a first switch connected between a gate of the first transistor and a gate of the second transistor, a second switch connected between an error amplifier of the linear regulator circuit and the gate of the second transistor, a third switch connected between the first output terminal and a drain of the second transistor, and a fourth switch connected between the drain of the second transistor and the second output terminal.

9. The dual-mode regulator circuit according to claim 1 , wherein the second output terminal is electrically connected to an electric load.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2016
From: HSIEH, CHUNG-MING
To: NUVOTON TECHNOLOGY CORPORATION
Reel/Frame 040605/0031 →
Priority Claims (1)
TW 104141198 A · Dec 8, 2015 · national
Continuity (1)
Related Publication 20170160756A1 · Jun 8, 2017