IP Library › Granted Patent US 9,900,009
Granted Patent B2
US 9,900,009 · App. 15/301,219 · Granted Feb 20, 2018

Level shift circuit

Inventor: Masashi Akahane (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H03K19/018507H03K17/162H03K17/687H03K19/00361H03K19/00369H03K2217/0063H03K2217/0072
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Quick Facts
Patent No.
US 9,900,009
App. No.
15/301,219
Granted
Feb 20, 2018
Kind
B2
Abstract

The present invention provides a level-shift circuit that can suppress the malfunction caused by the noise due to the ON/OFF of a level-shift transistor and the dV/dt noise due to external noise. The present invention provides a level-shift circuit for transmitting a signal from a primary potential side to a secondary potential side, comprising: a first serial circuit a first resistance including serially-connected to a first switching element; a second serial circuit including a second resistance serially-connected to a second switching element; a latch malfunction protection circuit for which the respective output terminals of the first and second serial circuits are connected to an input terminal; a latch circuit for receiving a signal outputted from the latch malfunction protection circuit; and a capacitor connected between drain terminals of the first resistance and the first switching element and between drain terminals of the second resistance and the second switching element.

Claims (11)

1. A level-shift circuit for IC for transmitting a signal from a primary potential side to a secondary potential side different from the primary potential side, comprising:

a first serial circuit including a first resistance serially-connected to a first switching element, wherein the input of the first switching element is a first input signal for turning ON or OFF the first switching element, and a connecting point of the first resistance and the first switching element acts as an output terminal;

a second serial circuit including a second resistance serially-connected to a second switching element, wherein the input of the second switching element is a second input signal for controlling the ON/OFF of the second switching element, a connecting point of the second resistance and the second switching element acts as an output terminal, and the first input signal and the second input signal are not simultaneously turned ON;

a latch circuit for changing a status depending on the output of the output terminal of the first serial circuit and the output of the output terminal of the second serial circuit;

a first capacitor connected between the output terminal of the first serial circuit and the output terminal of the second serial circuit; and

one or more additional capacitors parallelly connected to the first capacitor,

wherein the first capacitor and the one or more additional capacitors have a different frequency characteristic, respectively.

2. The level-shift circuit according to claim 1 , wherein:

both the first switching element and the second switching element are an N channel-type semiconductor switching element or a P channel-type semiconductor switching element.

3. The level-shift circuit according to claim 1 , wherein:

both the first switching element and the second switching element are an N channel-type semiconductor switching element or a P channel-type semiconductor switching element.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2016
From: AKAHANE, MASASHI
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 039912/0574 →
Priority Claims (1)
JP 2014-203293 · Oct 1, 2014 · national
Continuity (1)
Related Publication 20170019106A1 · Jan 19, 2017