Shift register circuit, drive circuit, and display device
A shift register circuit has a plurality of unit circuits that are cascade-connected to one another and that output received pulse signals as output signals in accordance with a clock signal, the shift register circuit sequentially outputting the output signals from the plurality of respective unit circuits. The output circuits each include a double-gate transistor having first gate electrode that controls conductivity between the drain electrode and the source electrode, and a second gate electrode formed through an insulating layer and disposed to face the first gate electrode across a semiconductor layer between the drain electrode and the source electrode. The shift register circuit applies a prescribed voltage to the second gate electrode in accordance with a voltage applied to the first gate electrode.
1. A shift register circuit, comprising:
a plurality of unit circuits that are cascade-connected to one another and that each sequentially output a received pulse signal as an output signal in accordance with a clock signal,
wherein the unit circuits each include a transistor having a double-gate structure comprising a drain electrode, a source electrode, a first gate electrode that controls conductivity between the drain electrode and the source electrode, and a second gate electrode formed through an insulating layer and disposed to face the first gate electrode across a semiconductor layer between the drain electrode and the source electrode,
wherein, in each of the unit circuits, a prescribed voltage is applied to the second gate electrode in accordance with a voltage applied to the first gate electrode,
wherein the respective unit circuits, when applying a voltage representing a high logic state to the first gate electrode, apply a voltage representing a low logic state to the second gate electrode,
wherein the respective unit circuits, when applying a voltage representing a low logic state to the first gate electrode, apply a voltage representing a high logic state to the second gate electrode,
wherein the transistor having the double-gate structure is an output transistor connected to an output terminal outputting the output signal, and
wherein the second gate electrode of the output transistor is connected to an internal node in the same unit circuit such that a voltage representing a logic state that is an inverse of a logic state of a voltage applied to the first gate electrode is applied to the second gate electrode.
2. The shift register circuit according to claim 1 , wherein the transistor having the double-gate structure is formed by an oxide semiconductor.
3. The shift register circuit according to claim 1 , wherein the second gate electrode is formed as a transparent electrode.
4. A drive circuit, comprising:
the shift register circuit according to claim 1 .
5. A display device, comprising:
the drive circuit according to claim 4 .