Semiconductor substrate
Provided is a semiconductor substrate including a seed layer disposed on a substrate, a buffer layer disposed on the seed layer, a plurality of nitride semiconductor layers disposed on the buffer layer, and at least one stress control layer between the plurality of nitride semiconductor layers. The buffer layer includes a plurality of step regions and at least one heterogeneous region. The plurality of step regions includes the same nitride semiconductor material. The heterogeneous region includes a different nitride semiconductor material from the step regions.
1. A semiconductor substrate comprising:
a substrate;
a seed layer on the substrate;
a buffer layer on the seed layer;
a crystallinity control layer on the buffer layer;
a plurality of first nitride semiconductor layers on the crystallinity control layer; and
at least one stress control layer between the plurality of first nitride semiconductor layers,
wherein
the crystallinity control layer comprises a plurality of second nitride semiconductor layers and a plurality of mask layers alternately stacked, the second nitride semiconductor layer including AlxGa(1−x)N (0<x<1),
each of the plurality of second nitride semiconductor layers has a thickness smaller than a thickness of each of the plurality of mask layers and each of the plurality of mask layers protrudes from a top surface of each of the plurality of second nitride semiconductor layers in an upper direction,
the buffer layer comprises a plurality of step regions and at least one heterogeneous region,
the plurality of step regions comprises a first step region and a second step region that are adjacent to the seed layer,
the seed layer and the plurality of step regions comprise aluminum (Al), and
a difference in amounts of Al between the seed layer and the first step region is in a range of 30% to 60%.
2. The semiconductor substrate of claim 1 , wherein, when the mask layer and the second nitride semiconductor layer are set as a pair, the crystallinity control layer is composed of 2 pairs to 10 pairs, and a thickness of the crystallinity control layer is 300 nm.
3. The semiconductor substrate of claim 1 , wherein the amount of Al in the first step region is smaller than the amount of Al in the seed layer.
4. The semiconductor substrate of claim 1 , wherein an amount of Al in the second step region is smaller than the amount of Al in the first step region by 20% to 40%.
5. The semiconductor substrate of claim 1 , wherein an amount of Al in each of the step regions is different, and an amount of Al in the heterogeneous region is 0.
6. The semiconductor substrate of claim 1 , wherein an uppermost layer of the plurality of first nitride semiconductor layers is a conductive type semiconductor layer, and a thickness of the conductive type semiconductor layer is 2.0 .mu.m or more.
7. The semiconductor substrate of claim 1 , wherein the mask layer includes SiNx.
8. The semiconductor substrate of claim 1 , wherein the mask layer includes a plurality of patterns.
9. The semiconductor substrate of claim 8 , wherein the plurality of patterns have an irregular structure.
10. The semiconductor substrate of claim 1 , wherein the mask layer has a top surface including a protrusion.