Thin film transistor detection systems and related methods

1. A system comprising:

a sensor device comprising:

a sensor element comprising a sensor output; and

an amplification element comprising multiple amplification stages, an amplifier input, and an amplifier output;

wherein:

the sensor output is coupled to the amplifier input;

each amplification stage of the multiple amplification stages comprises at least four thin film transistors, an input node, and an output node;

the sensor element is configured to detect at least one of a physical quantity or an event and to provide an electric signal to the amplification element in response to detecting the at least one of the physical quantity or the event;

the amplification element is configured to amplify the electric signal received from the sensor element;

the at least four thin film transistors comprise at least four N-type thin film transistors;

the at least four N-type thin film transistors comprise a first N-type thin film transistor, a second N-type thin film transistor, a third N-type thin film transistor, and a fourth N-type thin film transistor;

each N-type thin film transistor of the at least four N-type thin film transistors comprises a gate, a source, and a drain;

for the each amplification stage of the multiple amplification stages:

the source of the third N-type thin film transistor is directly coupled to the gate and the drain of the second N-type thin film transistor so that the second N-type thin film transistor and the third N-type thin film transistor are coupled in series with each other; and

the source of the second N-type thin film transistor is directly coupled to the input node;

the multiple amplification stages comprise at least two amplification stages coupled in series;

adjacent amplification stages of the at least two amplification stages each are coupled together in series by at least one amplifier capacitor;

the multiple amplification stages comprise a first amplification stage and a final amplification stage;

the amplifier input comprises the input node of the first amplification stage; and

the amplifier output comprises the output node of the final amplification stage.

2. The system of claim 1 wherein:

the sensor element comprises a PIN diode.

3. The system of claim 1 wherein:

for each amplification stage of the multiple amplification stages:

the gate for the first N-type thin film transistor is directly coupled to the input node;

the drain for the third N-type thin film transistor is directly coupled to the output node; and

the source for the fourth N-type thin film transistor is directly coupled to the output node.

4. The system of claim 1 wherein:

the amplifier input is self-biased in a direct current regime by the second N-type thin film transistor and the third N-type thin film transistor.

5. The system of claim 1 wherein:

the at least two amplification stages coupled in series comprise at least three amplification stages coupled in series;

the at least three amplification stages comprise the first amplification stage, the final amplification stage, and a second amplification stage;

the output node of the first amplification stage is coupled in series to the input node of the second amplification stage by a first amplifier capacitor; and

the output node of the second amplification stage is coupled in series to the input node of the final amplification stage by a second amplifier capacitor.

6. The system of claim 1 further comprising:

a row access transistor; and

one of:

(a) a unity gain buffer and a column reset transistor, wherein the unity gain buffer and the column reset transistor are coupled to the row access transistor; or

(b) a current integrator and a source follower element comprising a source follower element capacitor and a source follower transistor coupled to the row access transistor, wherein the source follower element capacitor couples the source follower transistor to the amplifier output and the row access transistor is coupled to the current integrator.

7. The system of claim 1 further comprising:

a flexible substrate; and

a device layer over the flexible substrate;

wherein:

the device layer comprises at least part of multiple sensor devices; and

the multiple sensor devices comprise the sensor device.

8. The system of claim 7 further comprising:

a neutron conversion layer over the device layer.

9. The system of claim 8 wherein:

the neutron conversion layer comprises at least one of 10-Boron or 6-Lithium.

10. The system of claim 8 further comprising:

a moderator layer over the neutron conversion layer.

11. The system of claim 1 wherein:

the drain of the fourth N-type thin film transistor is shorted to the gate of the fourth N-type thin film transistor.

12. The system of claim 1 wherein:

a length of the gate of the fourth N-type thin film transistor is longer than at least one of a length of the gate of the first N-type thin film transistor, a length of the gate of the second N-type thin film transistor, or a length of the gate of the third N-type thin film transistor.

13. A method of providing a system, the method comprising:

providing a sensor device;

wherein:

providing the sensor device comprises:

providing a sensor element comprising a sensor output;

providing an amplification element comprising an amplifier input and an amplifier output; and

coupling the sensor output to the amplifier input;

providing the amplification element comprises providing multiple amplification stages;

providing the multiple amplification stages comprises:

for each amplification stage of the multiple amplification stages:

providing at least four N-type thin film transistors, the at least four N-type thin film transistors comprising a first N-type thin film transistor, a second N-type thin film transistor, a third N-type thin film transistor, and a fourth N-type thin film transistor, and each N-type thin film transistor of the at least four N-type thin film transistors comprising a gate, a source, and a drain;

providing an input node and an output node;

directly coupling the source of the third N-type thin film transistor to the gate and the drain of the second N-type thin film transistor so that the second N-type thin film transistor and the third N-type thin film transistor are coupled in series with each other; and

directly coupling the source of the second N-type thin film transistor to the input node;

and

coupling together in series at least two amplification stages of the multiple amplification stages;

coupling together in series the at least two amplification stages of the multiple amplification stages comprises:

coupling together in series adjacent amplification stages of the at least two amplification stages of the multiple amplification stages by at least one amplifier capacitor;

the multiple amplification stages comprise a first amplification stage and a final amplification stage;

the amplifier input comprises the input node of the first amplification stage;

the amplifier output comprises the output node of the final amplification stage;

the sensor element is configured to detect at least one of a physical quantity or an event and to provide an electric signal to the amplification element in response to detecting the at least one of the physical quantity or the event; and

the amplification element is configured to amplify the electric signal received from the sensor element.

14. The method of claim 13 wherein:

providing the sensor element comprises providing a PIN diode.

15. The method of claim 13 wherein:

providing the at least four N-type thin film transistors comprises:

configuring the amplifier input to be self-biased in a direct current regime by the second N-type thin film transistor and the third N-type thin film transistor;

configuring the drain of the fourth N-type thin film transistor to be shorted to the gate of the fourth N-type thin film transistor; and

configuring a length of the gate of the fourth N-type thin film transistor to be longer than at least one of a length of the gate of the first N-type thin film transistor, a length of the gate of the second N-type thin film transistor, or a length of the gate of the third N-type thin film transistor.

16. The method of claim 13 further comprising:

providing a flexible substrate; and

providing a device layer over the flexible substrate;

wherein:

providing the device layer comprising providing at least part of multiple sensor devices; and

providing the at least the part of the multiple sensor devices comprises providing at least part of the sensor device.

17. The method of claim 16 further comprising:

providing a neutron conversion layer over the device layer; and

providing a moderator layer over the neutron conversion layer.

18. A system comprising:

a flexible substrate; and

a device layer over the flexible substrate, the device layer comprising at least part of multiple sensor devices;

wherein:

each sensor device of the multiple sensor devices comprises:

a sensor element comprising a sensor output; and

an amplification element comprising multiple amplification stages, an amplifier input, and an amplifier output;

the at least the part of the multiple sensor devices comprises the sensor element and the amplification element;

the sensor output is coupled to the amplifier input;

each amplification stage of the multiple amplification stages comprises an input node, an output node, and at least four N-type thin film transistors comprising a first N-type thin film transistor, a second N-type thin film transistor, a third N-type thin film transistor, and a fourth N-type thin film transistor;

the sensor element is configured to detect at least one of a physical quantity or an event and to provide an electric signal to the amplification element in response to detecting the at least one of the physical quantity or the event;

the amplification element is configured to amplify the electric signal received from the sensor element;

the sensor element comprises a PIN diode;

each N-type thin film transistor of the at least four N-type thin film transistors comprises a gate, a source, and a drain;

for each amplification stage of the multiple amplification stages:

the source of the third N-type thin film transistor is directly coupled to the gate and the drain of the second N-type thin film transistor so that the second N-type thin film transistor and the third N-type thin film transistor are coupled in series with each other;

the source of the second N-type thin film transistor is directly coupled to the input node;

the gate for the first N-type thin film transistor is directly coupled to the input node;

the drain for the third N-type thin film transistor is directly coupled to the output node;

the source for the fourth N-type thin film transistor is directly coupled to the output node;

the drain of the fourth N-type thin film transistor is shorted to the gate of the fourth N-type thin film transistor; and

a length of the gate of the fourth N-type thin film transistor is longer than at least one of a length of the gate of the first N-type thin film transistor, a length of the gate of the second N-type thin film transistor, or a length of the gate of the third N-type thin film transistor;

the multiple amplification stages comprise three amplification stages coupled in series;

adjacent amplification stages of the three amplification stages each are coupled together in series by at least one amplifier capacitor, respectively;

the three amplification stages comprise a first amplification stage and a final amplification stage;

the amplifier input comprises the input node of the first amplification stage; and

the amplifier output comprises the output node of the final amplification stage.

19. The system of claim 18 wherein:

the physical quantity comprises a charge; and

the event comprises receipt of ionizing radiation.

20. The method of claim 17 wherein:

the neutron conversion layer comprises 10-Boron.

21. The method of claim 17 wherein:

the neutron conversion layer comprises 6-Lithium.