Self-aligned double spacer patterning process

1. A method of forming a semiconductor structure, the method comprising:

forming a mandrel layer over a semiconductor substrate;

forming and patterning a photoresist over the mandrel layer to have first widths;

trimming the patterned photoresist to have second widths;

patterning the mandrel layer to form a first set of mandrels using the patterned and trimmed photoresist as a mask;

forming a first spacer layer over the first set of mandrels and the semiconductor substrate, the first spacer layer having second widths on at least sidewalls of the first set of mandrels;

forming a second spacer layer over the first spacer layer, the second spacer layer having second widths on at least sidewalls of the first spacer layer;

patterning the first spacer layer and the second spacer layer;

patterning the semiconductor substrate to form trenches using the pattern of the patterned first spacer layer and second spacer layer; and

forming a material in the trenches of the semiconductor substrate.

2. The method of claim 1 , wherein the material has a different material composition than the semiconductor substrate.

3. The method of claim 1 , wherein the forming the first spacer layer over the first set of mandrels and the semiconductor substrate comprises:

conformally depositing the first spacer layer to have a thickness of the second width over the first set of mandrels and the semiconductor substrate.

4. The method of claim 3 , wherein the forming the second spacer layer over the first spacer layer comprises:

conformally depositing the second spacer layer to have a thickness of the second width over the first spacer layer.

5. The method of claim 1 , wherein the second width is about one-third of the first width.

6. The method of claim 1 , wherein at least one of the first spacer layer and the second spacer layer is a metal-containing spacer layer.

7. The method of claim 1 , wherein the patterning the first spacer layer and the second spacer layer comprises:

removing portions of the second spacer layer to expose the first spacer layer;

removing first portions of the exposed first spacer layer; and

removing second portions of the exposed first spacer layer between the first set of mandrels and remaining portions of the second spacer layer.

8. The method of claim 7 , wherein the removing the first portions of the exposed first spacer layer forms a first set of spacers having a third width on sidewalls of the first set of mandrels, the third width being greater than the second width.

9. The method of claim 8 , wherein the removing the second portions of the exposed first spacer layer forms a second set of spacers of the second width.

10. The method of claim 9 , wherein at least two of the second set of spacers includes remaining portions of the first spacer layer and the second spacer layer.

11. The method of claim 9 , wherein at least one of the second set of spacers includes remaining one mandrel of the first set of mandrels.

12. A method comprising:

forming at least one mandrel over a first mask layer;

depositing a first spacer layer over the at least one mandrel and the first mask layer;

depositing a second spacer layer over the first spacer layer;

etching the first spacer layer and the second spacer layer to form a first set of spacers on sidewalls of the at least one mandrel, each of the first set of spacers comprising a portion of the first spacer layer and a portion of the second spacer layer, each of the first set of spacers having a first width;

etching the first set of spacers to form a second set of spacers over the first mask layer, each of the second set of spacers having a second width, the second width being less than the first width; and

etching the first mask layer using the second set of spacers as a mask.

13. The method of claim 12 , wherein the forming the at least one mandrel over the first mask layer comprises:

forming a mandrel layer over the first mask layer;

forming and patterning a photoresist over the mandrel layer to have third widths;

trimming the patterned photoresist to have the second widths; and

patterning the mandrel layer to form the at least one mandrel using the patterned and trimmed photoresist as a mask.

14. The method of claim 12 , wherein the second width is about one-half of the first width.

15. The method of claim 12 , wherein each of the second set of spacers are separated from adjacent spacers of the second set of spacers by a first spacing, the first spacing being equal to the second width.

16. The method of claim 12 , wherein at least a portion of each of the second set of spacers comprises titanium.

17. The method of claim 12 , wherein the portion of the second spacer layer is on the portion of the first spacer layer in each of the first set of spacers.

18. A method comprising:

forming a first mask layer over a semiconductor device layer;

forming a second mask layer over the first mask layer;

forming and patterning a third mask layer over the second mask layer to form a plurality of third mask portions;

patterning the second mask layer using the plurality of third mask portions as a mask to form a plurality of second mask portions;

removing the plurality of third mask portions;

forming a first spacer layer over the plurality of second mask portions and the first mask layer;

forming a second spacer layer over the first spacer layer;

etching top surfaces of the second spacer layer with a first etching process to expose top surfaces of the first spacer layer;

etching the exposed top surfaces of the first spacer layer with a second etching process to expose top surfaces of the first mask layer and to form a mask pattern; and

patterning the first mask layer and the semiconductor device layer using the mask pattern as a mask.

19. The method of claim 18 further comprising:

forming a material in openings of the patterned semiconductor device layer.

20. The method of claim 18 , wherein the first etching process is selective to the second spacer layer, and wherein the second etching process is selective to the first spacer layer.