IP Library › Granted Patent US 9,917,113
Granted Patent B2
US 9,917,113 · App. 15/429,411 · Granted Mar 13, 2018

Array substrate and method of mounting integrated circuit using the same

Inventor: Dae Geun Lee (Hwaseong-si, KR)
Assignee: Samsung Display Co., Ltd.
H01L27/124H01L24/05H01L24/06H01L24/81G02F1/13458H01L27/3276H01L2224/05552H01L2224/06152H01L2224/81132H01L2924/3511
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Quick Facts
Patent No.
US 9,917,113
App. No.
15/429,411
Granted
Mar 13, 2018
Kind
B2
Abstract

An array substrate including a display area and a non-display area surrounding the display area. The non-display area includes a pad portion including one or more first pads that each have a parallelogram shape.

Claims (38)

1. An electronic device comprising:

an array substrate;

a pad portion disposed on the array substrate; and

an integrated circuit disposed on the pad portion and comprising a bump portion;

wherein:

the pad portion comprises a first sub-pad unit comprising a first pad having a parallelogram shape and a second sub-pad unit comprising a second pad having a parallelogram shape, and the first pad and the second pad are symmetrically arranged with respect to a first imaginary line that divides the pad portion; and

the pad portion is electrically connected to the bump portion.

2. The electronic device of claim 1 , wherein the bump portion comprises a first sub-bump unit comprising a first bump having a parallelogram shape and a second sub-bump unit comprising a second bump having a parallelogram shape.

3. The electronic device of claim 2 , wherein the first bump and the second bump are symmetrically arranged with respect to a second imaginary line that divides the bump portion.

4. The electronic device of claim 2 , wherein a shape of the first bump corresponds to a shape of the first pad, and a shape of the second bump corresponds to a shape of the second pad.

5. The electronic device of claim 2 , wherein the first pad is electrically connected to the first bump and the second pad is electrically connected to the second bump.

6. The electronic device of claim 2 , wherein an area of the first pad is larger than an area of the first bump.

7. The electronic device of claim 2 , wherein the pad portion further comprises a third sub-pad unit comprising a third pad having a rectangular shape and disposed between the first sub-pad unit and the second sub-pad unit.

8. The electronic device of claim 7 , wherein the bump portion further comprises a third sub-bump unit comprising a third bump having a rectangular shape and disposed between the first sub-bump unit and the second sub-bump unit.

9. The electronic device of claim 2 , wherein:

the first bump comprises a first region and a second region; and

the first region overlaps the first pad and the second region does not overlap the first pad.

10. The electronic device of claim 2 , wherein the first bump completely overlaps the first pad.

11. An electronic device comprising:

an array substrate;

a pad portion disposed on the array substrate; and

an integrated circuit disposed on the pad portion and comprising a bump portion;

wherein:

the pad portion comprises a first sub-pad unit comprising first pads each having a parallelogram shape; and

the bump portion comprises a first sub-bump unit comprising first bumps each having a parallelogram shape, and a second sub-bump unit comprising second bumps each having a parallelogram shape.

12. The electronic device of claim 11 , wherein:

the pad portion further comprises a second sub-pad unit comprising second pads each having a parallelogram shape; and

the first pads and the second pads are symmetrically arranged with respect to a first imaginary line that divides the pad portion.

13. The electronic device of claim 12 , wherein:

the bump portion further comprises a second sub-bump unit comprising second bumps each having a parallelogram shape; and

the first bumps and the second bumps are symmetrically arranged with respect to a second imaginary line that divides the pad portion.

14. The electronic device of claim 12 , wherein:

each of the first pads have an inclination angle defined as an acute internal angle between the short sides and the long sides of each of the first pads; and

inclination angles of the first pads increase as the first pads get closer to the first imaginary line.

15. The electronic device of claim 12 , wherein:

each of the second pads have an inclination angle defined as an acute internal angle between the short sides and the long sides of each of the second pads; and

inclination angles of the second pads increase as the second pads get closer to the first imaginary line.

16. The electronic device of claim 12 , wherein the pad portion further comprises a third sub-pad unit comprising a third pad having a rectangular shape and disposed between the first sub-pad unit and the second sub-pad unit.

Priority Claims (1)
KR 10-2014-0073756 · Jun 17, 2014 · national
Continuity (2)
Continuation 14526182 · Oct 28, 2014
Related Publication 20170154899A1 · Jun 1, 2017