IP Library › Granted Patent US 9,924,163
Granted Patent B2
US 9,924,163 · App. 14/197,869 · Granted Mar 20, 2018

Image processing apparatus and image processing method

Inventor: Sinsuke Hishinuma (Tokyo, JP)
Assignee: SONY CORPORATION
H04N19/00066H04N19/117H04N19/14H04N19/176H04N19/86H04N19/82
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Quick Facts
Patent No.
US 9,924,163
App. No.
14/197,869
Granted
Mar 20, 2018
Kind
B2
Abstract

An image processing apparatus includes a decoding unit, a deblocking filter, and a sample adaptive offset processing unit. The decoding unit is configured to perform a decoding process for a coded stream to generate an image. The deblocking filter is configured to store a block, a corresponding block of which on a current edge is not input, in a memory, out of blocks of the image generated by the decoding unit and read the block stored in the memory at timing when the corresponding block is input, to perform a filter process. The sample adaptive offset processing unit is configured to perform a sample adaptive offset process by using a pixel of the block that has been subjected to the filter process by the deblocking filter.

Claims (31)

1. An image processing apparatus, comprising:

a decoding unit configured to perform a decoding process for a coded stream to generate an image;

a deblocking filter having a vertical edge deblocking filter and a horizontal edge deblocking filter and configured to sequentially store a block, a corresponding block of which on a current edge is not input, in each memory of a plurality of memories including a vertical memory associated with the vertical edge deblocking filter, a horizontal memory associated with the horizontal edge deblocking filter, and a vertical and horizontal intermediate memory configured between the vertical memory and the horizontal memory and associated with both the vertical edge deblocking filter and the horizontal edge deblocking filter, out of blocks of the image generated by the decoding unit, and read the block sequentially stored in each memory of the plurality of memories including the vertical memory, the horizontal memory, and the vertical and horizontal intermediate memory at timing when the corresponding block is input into one or more of the vertical edge deblocking filter and the horizontal edge deblocking filter, to perform a filter process; and

a sample adaptive offset processing unit configured to perform a sample adaptive offset process by using a pixel of the block that has been subjected to the filter process by the deblocking filter,

wherein the decoding unit, the deblocking filter, and the sample adaptive offset processing unit are each implemented via at least one processor.

2. The image processing apparatus according to claim 1 , wherein the deblocking filter stores, in the vertical and horizontal intermediate memory, a block disposed on a left side of a current vertical edge, out of the blocks of the image generated by the decoding unit, and reads the block stored in the vertical and horizontal intermediate memory at timing when a block disposed on a right side of the vertical edge is input, to perform the filter process.

3. The image processing apparatus according to claim 1 , wherein the deblocking filter stores, in the vertical and horizontal intermediate memory, a block disposed on an upper side of a current horizontal edge, out of the blocks of the image generated by the decoding unit, and reads the block stored in the vertical and horizontal intermediate memory at timing when a block disposed on a lower side of the horizontal edge is input, to perform the filter process.

4. The image processing apparatus according to claim 1 , wherein the deblocking filter stores the block, the corresponding block of which on the current edge is not input, in the vertical and horizontal intermediate memory, out of the blocks of the image generated by the decoding unit, and outputs a pixel on at least an uppermost line of the block to the sample adaptive offset processing unit.

5. The image processing apparatus according to claim 1 , wherein sequentially storing the block comprises storing the block in the vertical memory while the corresponding block along a vertical edge is input into the vertical edge deblocking filter, inputting a vertical result of the vertical edge deblocking filter for the block to the vertical and horizontal intermediate memory, storing the vertical result for the block in the vertical and horizontal intermediate memory while each corresponding block along the vertical edge is input into the vertical edge deblocking filter until the corresponding block along a horizontal edge is input into the horizontal edge deblocking filter, inputting a horizontal result of the horizontal edge deblocking filter for the block to the horizontal memory, and storing the horizontal result for the block in the horizontal memory while each corresponding block along the horizontal edge is input into the horizontal edge deblocking filter.

6. An image processing method, implemented via at least one processor, the method comprising:

performing a decoding process for a coded stream to generate an image, by an image processing apparatus;

sequentially storing a block, a corresponding block of which on a current edge is not input, in each memory of a plurality of memories including a vertical memory associated with the vertical edge deblocking filter, a horizontal memory associated with the horizontal edge deblocking filter, and a vertical and horizontal intermediate memory configured between the vertical memory and the horizontal memory and associated with both a vertical edge deblocking filter and a horizontal edge deblocking filter, out of blocks of the image generated, and reading the block sequentially stored in each memory of the plurality of memories including the vertical memory, the horizontal memory, and the vertical and horizontal intermediate memory at timing when the corresponding block is input into one or more of the vertical edge deblocking filter and the horizontal edge deblocking filter, to perform a filter process, by the image processing apparatus; and

performing a sample adaptive offset process by using a pixel of the block that has been subjected to the filter process, by the image processing apparatus.

7. The image processing method according to claim 6 , wherein sequentially storing the block comprises storing the block in the vertical memory while the corresponding block along a vertical edge is input into the vertical edge deblocking filter, inputting a vertical result of the vertical edge deblocking filter for the block to the vertical and horizontal intermediate memory, storing the vertical result for the block in the vertical and horizontal intermediate memory while each corresponding block along the vertical edge is input into the vertical edge deblocking filter until the corresponding block along a horizontal edge is input into the horizontal edge deblocking filter, inputting a horizontal result of the horizontal edge deblocking filter for the block to the horizontal memory, and storing the horizontal result for the block in the horizontal memory while each corresponding block along the horizontal edge is input into the horizontal edge deblocking filter.

8. An image processing apparatus, comprising:

a deblocking filter having a vertical edge deblocking filter and a horizontal edge deblocking filter and configured to sequentially store a block, a corresponding block of which on a current edge is not input, in each memory of a plurality of memories including a vertical memory associated with the vertical edge deblocking filter, a horizontal memory associated with the horizontal edge deblocking filter, and a vertical and horizontal intermediate memory configured between the vertical memory and the horizontal memory and associated with both the vertical edge deblocking filter and the horizontal edge deblocking filter, out of blocks of an image for which a local decoding process is performed at a time of image coding, and read the block sequentially stored in each memory of the plurality of memories including the vertical memory, the horizontal memory, and the vertical and horizontal intermediate memory at timing when the corresponding block is input into one or more of the vertical edge deblocking filter and the horizontal edge deblocking filter, to perform a filter process;

a sample adaptive offset processing unit configured to perform a sample adaptive offset process by using a pixel of the block that has been subjected to the filter process by the deblocking filter; and

a coding unit configured to code the image by using the pixel that has been subjected to the sample adaptive offset process by the sample adaptive offset processing unit,

wherein the deblocking filter, the sample adaptive offset processing unit, and the coding unit are each implemented via at least one processor.

9. The image processing apparatus according to claim 8 , wherein

the deblocking filter stores, in the vertical and horizontal intermediate memory, a block disposed on a left side of a current vertical edge, out of the blocks of the image for which the local decoding process is performed at the time of image coding, and reads the block stored in the vertical and horizontal intermediate memory at timing when a block disposed on a right side of the vertical edge is input, to perform the filter process.

10. The image processing apparatus according to claim 8 , wherein

the deblocking filter stores, in the vertical and horizontal intermediate memory, a block disposed on an upper side of a current horizontal edge, out of the blocks of the image for which the local decoding process is performed at the time of image coding, and reads the block stored in the vertical and horizontal intermediate memory at timing when a block disposed on a lower side of the horizontal edge is input, to perform the filter process.

11. The image processing apparatus according to claim 8 , wherein

the deblocking filter stores the block, the corresponding block of which on the current edge is not input, in the vertical and horizontal intermediate memory, out of the blocks of the image for which the local decoding process is performed at the time of image coding, and outputs a pixel on at least an uppermost line of the block to the sample adaptive offset processing unit.

12. The image processing apparatus according to claim 8 , wherein sequentially storing the block comprises storing the block in the vertical memory while the corresponding block along a vertical edge is input into the vertical edge deblocking filter, inputting a vertical result of the vertical edge deblocking filter for the block to the vertical and horizontal intermediate memory, storing the vertical result for the block in the vertical and horizontal intermediate memory while each corresponding block along the vertical edge is input into the vertical edge deblocking filter until the corresponding block along a horizontal edge is input into the horizontal edge deblocking filter, inputting a horizontal result of the horizontal edge deblocking filter for the block to the horizontal memory, and storing the horizontal result for the block in the horizontal memory while each corresponding block along the horizontal edge is input into the horizontal edge deblocking filter.

13. An image processing method, implemented via at least one processor, the method comprising:

sequentially storing a block, a corresponding block of which on a current edge is not input, in each memory of a plurality of memories including a vertical memory associated with the vertical edge deblocking filter, a horizontal memory associated with the horizontal edge deblocking filter, and a vertical and horizontal intermediate memory configured between the vertical memory and the horizontal memory and associated with both a vertical edge deblocking filter and a horizontal edge deblocking filter, out of blocks of an image for which a local decoding process is performed at a time of image coding, and reading the block sequentially stored in each memory of the plurality of memories including the vertical memory, the horizontal memory, and the vertical and horizontal intermediate memory at timing when the corresponding block is input into one or more of the vertical edge deblocking filter and the horizontal edge deblocking filter, to perform a filter process, by an image processing apparatus;

performing a sample adaptive offset process by using a pixel of the block that has been subjected to the filter process, by the image processing apparatus; and

coding the image by using the pixel that has been subjected to the sample adaptive offset process, by the image processing apparatus.

14. The image processing method according to claim 13 , wherein sequentially storing the block comprises storing the block in the vertical memory while the corresponding block along a vertical edge is input into the vertical edge deblocking filter, inputting a vertical result of the vertical edge deblocking filter for the block to the vertical and horizontal intermediate memory, storing the vertical result for the block in the vertical and horizontal intermediate memory while each corresponding block along the vertical edge is input into the vertical edge deblocking filter until the corresponding block along a horizontal edge is input into the horizontal edge deblocking filter, inputting a horizontal result of the horizontal edge deblocking filter for the block to the horizontal memory, and storing the horizontal result for the block in the horizontal memory while each corresponding block along the horizontal edge is input into the horizontal edge deblocking filter.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2014
From: HISHINUMA, SINSUKE
To: SONY CORPORATION
Reel/Frame 032389/0208 →
Priority Claims (1)
JP 2013-083453 · Apr 12, 2013 · national
Continuity (1)
Related Publication 20140307772A1 · Oct 16, 2014