IP Library Granted Patent US 9,929,200
Granted Patent B2
US 9,929,200 · App. 14/506,843 · Granted Mar 27, 2018

Image pickup device, method of manufacturing image pickup device, and electronic apparatus

Inventor: Shinya Sato (Kumamoto, JP)
Assignee: Sony Corporation
H01L27/1463H01L27/1464H01L27/1469H01L27/14634H01L27/14641
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Quick Facts
Patent No.
US 9,929,200
App. No.
14/506,843
Granted
Mar 27, 2018
Kind
B2
Abstract

Provided is an image pickup device, including: a first trench provided between a plurality of pixels in a light-receiving region of a semiconductor substrate, the semiconductor substrate including the light-receiving region and a peripheral region, the light-receiving region being provided with the plurality of pixels each including a photoelectric conversion section; and a second trench provided in the peripheral region of the semiconductor substrate, wherein the semiconductor substrate has a variation in thickness between a portion where the first trench is provided and a portion where the second trench is provided.

Claims (42)

1. An imaging device, comprising:

a first semiconductor section including a first semiconductor substrate and a first wiring layer provided at a first side of the first semiconductor substrate that is opposite to a light-incident side of the first semiconductor substrate, the first semiconductor substrate including:

a light-receiving region including a plurality of photoelectric conversion regions,

a peripheral region,

an insulating film at the first side of the first semiconductor substrate,

a first trench including a fixed charge film adjacent to at least one photoelectric conversion region of the plurality of photoelectric conversion regions, and

a second trench located in the peripheral region, wherein the second trench is in contact with the insulating film at the first side of the first semiconductor substrate; and

a second semiconductor section electrically connected to the first semiconductor section and including at least a portion of a logic circuit, the second semiconductor section being attached to the first side of the first semiconductor section such that the first semiconductor section is above the second semiconductor section.

2. The imaging device according to claim 1 , wherein a thickness of the first semiconductor substrate where the second trench is located is less than a thickness of the first semiconductor substrate where the first trench is located.

3. The imaging device according to claim 1 , further comprising a recess portion, wherein the recess portion is located in a region of one or both surfaces of the first semiconductor substrate, and wherein the region faces the second trench.

4. The imaging device according to claim 1 , wherein the first trench separates each photoelectric conversion region of the plurality of photoelectric conversion regions.

5. The imaging device according to claim 1 , further comprising an external connection electrode that is provided in the peripheral region, wherein the second trench is provided around the external connection electrode.

6. The imaging device according to claim 3 , wherein the recess portion is filled with an insulating material.

7. The imaging device according to claim 1 , wherein the second trench penetrates the first semiconductor substrate.

8. A method of manufacturing an imaging device, the method comprising:

forming a first semiconductor section including a first semiconductor substrate and a first wiring layer at a first side of the first semiconductor substrate that is opposite to a light-incident side of the first semiconductor substrate, the first semiconductor substrate including a light-receiving region and a peripheral region, the light-receiving region including a plurality of photoelectric conversion regions;

forming a first trench adjacent to at least one photoelectric conversion region of the plurality of photoelectric conversion regions in the light-receiving region of the first semiconductor substrate;

forming a fixed charge film within the first trench;

forming a second trench in the peripheral region of the first semiconductor substrate, wherein the second trench is in contact with an insulating film provided at the first side of the first semiconductor substrate; and

forming a second semiconductor section including at least a portion of a logic circuit, wherein the second semiconductor section is electrically connected to the first semiconductor section and the second semiconductor section is attached to the first side of the first semiconductor section such that the first semiconductor section is above the second semiconductor section; and

attaching the second semiconductor section to the first semiconductor section.

9. The method of manufacturing the imaging device according to claim 8 , further including:

forming a recess portion located in a surface of the first semiconductor substrate, wherein the recess portion is formed by two-stage etching.

10. The method of manufacturing the imaging device according to claim 9 , further including:

forming a second recess portion, the second recess portion being located in another surface of the first semiconductor substrate and facing the recess portion.

11. The method of manufacturing the imaging device according to claim 9 , further comprising embedding an insulating material in the recess portion.

12. An electronic apparatus provided with an imaging device, the imaging device comprising:

a first semiconductor section including a first semiconductor substrate that is opposite to a light-incident side of the first semiconductor substrate and a first wiring layer provided at a first side of the first semiconductor substrate, the first semiconductor substrate including:

a light-receiving region including a plurality of photoelectric conversion regions,

a peripheral region,

an insulating film at the first side of the first semiconductor substrate,

a first trench including a fixed charge film adjacent to at least one photoelectric conversion region of the plurality of photoelectric conversion regions, and

a second trench located in the peripheral region, wherein the second trench is in contact with the insulating film at the first side of the first semiconductor substrate; and

a second semiconductor section electrically connected to the first semiconductor section and including at least a portion of a logic circuit, the second semiconductor section being attached to the first side of the first semiconductor section such that the first semiconductor section is above the second semiconductor section.

13. The imaging device according to claim 1 , wherein the second trench is filled with a first material.

14. The imaging device according to claim 13 , further comprising a recess portion, wherein the recess portion is located in a region of one or both surfaces of the first semiconductor substrate and is filled with a second material, and wherein the first material is different from the second material.

15. The electronic apparatus according to claim 12 , wherein a thickness of the first semiconductor substrate where the second trench is provided is less than a thickness of the first semiconductor substrate where the first trench is provided.

16. The electronic apparatus according to claim 12 , further comprising a recess portion, wherein the recess portion is located in a region of one or both surfaces of the first semiconductor substrate, and wherein the region faces the second trench.

17. The electronic apparatus according to claim 16 , wherein the recess portion is filled with an insulating material.

18. The electronic apparatus according to claim 12 , wherein the first trench separates each photoelectric conversion region of the plurality of photoelectric conversion regions.

19. The electronic apparatus according to claim 12 , further comprising an external connection electrode that is provided in the peripheral region, wherein the second trench is provided around the external connection electrode.

20. The electronic apparatus according to claim 12 , wherein the second trench penetrates the first semiconductor substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2014
From: SATO, SHINYA
To: SONY CORPORATION
Reel/Frame 033897/0515 →
Priority Claims (1)
JP 2013-213645 · Oct 11, 2013 · national
Continuity (1)
Related Publication 20150102448A1 · Apr 16, 2015