IP Library Granted Patent US 9,929,263
Granted Patent B2
US 9,929,263 · App. 15/374,267 · Granted Mar 27, 2018

Semiconductor device and method of making a semiconductor device

Inventors: Jan Sonsky (Leuven, BE); Godefridus Adrianus Maria Hurkx (Best, NL); Jeroen Antoon Croon (Waalre, NL); Johannes Josephus Theodorus Marinus Donkers (Valkenswaard, NL)
Assignee: Nexperia B.V.
H01L29/7787H01L29/0649H01L29/2003H01L29/205H01L29/42316H01L29/42368H01L29/42376H01L29/4966H01L29/66462H01L29/7786H01L29/7788H01L29/872
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Quick Facts
Patent No.
US 9,929,263
App. No.
15/374,267
Granted
Mar 27, 2018
Kind
B2
Abstract

A semiconductor device and a method of making the same. The device includes a substrate having an AlGaN layer located on one or more GaN layers, for forming a two dimensional electron gas at an interface between the AlGaN layer and the GaN layer. The device also includes a source contact. The device further includes a drain contact. The device also includes a gate contact located between the source contact and the drain contact. The gate contact includes a gate electrode. The gate contact also includes an electrically insulating layer located between the gate electrode and the AlGaN layer. The insulating layer includes at least one aperture for allowing holes generated during an off-state of the device to exit the device through the gate electrode.

Claims (30)

1. A semiconductor device comprising:

a substrate having an AlGaN layer located on one or more GaN layers, for forming a two dimensional electron gas at an interface between the ALGaN layer and the GaN layer;

a source contact;

a drain contact; and

a gate contact located between the source contact and the drain contact, wherein the gate contact comprises:

a gate electrode comprising a first electrode portion and a second electrode portion; and

an electrically insulating layer located between the gate electrode and the AlGaN layer, wherein the electrically insulating layer includes at least one aperture for allowing holes generated during an off-state of the device to exit the device through the gate electrode,

wherein the first electrode portion includes at least one aperture aligned with the at least one aperture in the electrically insulating layer, and

wherein the second electrode portion substantially fills the at least one aperture in the first electrode portion.

2. The device of claim 1 , wherein the at least one aperture has a dimension that is approximately 20-70% of a gate length of the device.

3. The device of claim 1 where ΣA apertures is the total cross sectional area of the at least one aperture in the electrically insulating layer between the gate electrode and the AlGaN layer when viewed from above the AlGaN layer, where A gate is the area of the gate electrode when viewed from above the AlGaN layer, and wherein 0.01≤ΣA apertures /A gate ≤0.1.

4. The device of claim 1 , wherein the electrically insulating layer comprises a plurality of the apertures.

5. The device of claim 4 , wherein the apertures are arranged in a regular array.

6. The device of claim 1 , wherein the at least one aperture is circular or rectangular, when viewed from above the AlGaN layer.

7. The device of claim 1 , wherein the first electrode portion and the second electrode portion comprise different electrically conductive materials.

8. The device of claim 1 , wherein at least a part of the gate electrode extends into the at least one aperture in the electrically insulating layer.

9. The device of claim 1 , wherein the gate contact comprises a further electrically insulating layer located between the gate electrode and the AlGaN layer, wherein the further insulating layer extends across the at least one aperture in the insulating layer for reducing leakage currents in the device.

10. The device of claim 9 , wherein the further insulating layer has a thickness in the range 1 nm≤T≤10 nm.

11. The device of claim 9 , wherein the further insulating layer comprises a material selected from the group consisting essentially of AlN, Al2O3, SiN, and SiO.

12. The device of claim 1 , wherein the gate electrode comprises a material selected from the group consisting essentially of TiW/Al, TiWN/Al TiN/Al, Tungsten and AlCu.

13. A method of making a semiconductor device, the method comprising:

providing a substrate having an AlGaN layer located on one or more GaN layers, for forming a two dimensional electron gas at an interface between the AlGaN layer and the GaN layer;

forming a source contact of the device;

forming a drain contact of the device; and

forming a gate contact of the device between the source contact and the drain contact by:

forming an electrically insulating layer having at least one aperture; and

forming a gate electrode comprising a first electrode portion and a second electrode portion such that the electrically insulating layer is located between the gate electrode and the AlGaN layer,

wherein the at least one aperture in the electrically insulating layer is formed to allow holes generated during an off-state of the device to exit the device through the gate electrode,

wherein the first electrode portion includes at least one aperture aligned with the at least one aperture in the electrically insulating layer, and

wherein the second electrode portion substantially fills the at least one aperture in the first electrode portion.

Assignments (3)
CHANGE OF ADDRESS Recorded Jul 16, 2018
From: NEXPERIA B.V.
To: NEXPERIA B.V.
Reel/Frame 047569/0754 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2017
From: NXP B.V.
To: NEXPERIA B.V.
Reel/Frame 041002/0454 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2016
From: SONSKY, JAN; HURKX, GODEFRIDUS ADRIANUS MARIA; CROON, JEROEN ANTOON; DONKERS, JOHANNES JOSEPHUS THEODORUS MARINUS
To: NXP B.V.
Reel/Frame 040879/0222 →
Priority Claims (1)
EP 16150164 · Jan 5, 2016 · regional
Continuity (1)
Related Publication 20170194473A1 · Jul 6, 2017