IP Library › Granted Patent US 9,941,036
Granted Patent B2
US 9,941,036 · App. 15/013,768 · Granted Apr 10, 2018

Modular, high density, low inductance, media cooled resistor

Inventors: Peter D. Morico (North Grafton, MA); Bradley S. Jaworski (Bedford, MA)
Assignee: RAYTHEON COMPANY
H01C1/082H01C13/02
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Quick Facts
Patent No.
US 9,941,036
App. No.
15/013,768
Granted
Apr 10, 2018
Kind
B2
Abstract

A resistor includes a first resistor element. The first resistor element is connected to at least a first electrical terminal and a second electrical terminal. The first resistor element is configured to directly contact cooling media on at least two surfaces of the first resistor element in order to transfer heat away from the first resistor element. The resistor may also include a second resistor element connected to at least the first electrical terminal and the second electrical terminal, where the second resistor element is configured to directly contact the cooling media on at least two surfaces of the second resistor element in order to transfer heat away from the second resistor element.

Claims (57)

1. A resistor comprising:

first and second electrical terminals that are spaced apart from each other, each electrical terminal comprising a plurality of connection points;

a first substantially planar resistor element having a first end connected to a first one of the connection points of the first electrical terminal and a second end connected to a first one of the connection points of the second electrical terminal, the first resistor element configured to directly contact one or more cooling media on at least two surfaces of the first resistor element in order to transfer heat away from the first resistor element; and

a second substantially planar resistor element having a first end connected to a second one of the connection points of the first electrical terminal and a second end connected to a second one of the connection points of the second electrical terminal, the second resistor element configured to directly contact the one or more cooling media on at least two surfaces of the second resistor element in order to transfer heat away from the second resistor element.

2. The resistor of claim 1 , wherein at least the first electrical terminal and the second electrical terminal form a media channel configured to communicate the one or more cooling media across the first and second resistor elements.

3. The resistor of claim 1 , wherein:

the at least two surfaces of the first resistor element are disposed on opposing sides of the first resistor element; and

the at least two surfaces of the second resistor element are disposed on opposing sides of the second resistor element.

4. The resistor of claim 1 , wherein:

when a voltage drop occurs across the first resistor element, the first resistor element is configured to transfer heat to the one or more cooling media via the at least two surfaces of the first resistor element; and

when a voltage drop occurs across the second resistor element, the second resistor element is configured to transfer heat to the one or more cooling media via the at least two surfaces of the second resistor element.

5. The resistor of claim 1 , wherein:

an area of each of the at least two surfaces of the first resistor element is greater than an area of each remaining surface of the first resistor element; and

an area of each of the at least two surfaces of the second resistor element is greater than an area of each remaining surface of the second resistor element.

6. The resistor of claim 1 , wherein each of the at least two surfaces of the first resistor element and each of the at least two surfaces of the second resistor element comprises a ruthenium (IV) oxide (RuO 2 ) film.

7. The resistor of claim 1 , wherein:

the at least two surfaces of the first resistor element are separated by a first substrate; and

the at least two surfaces of the second resistor element are separated by a second substrate.

8. A resistor system comprising:

a resistor; and

a manifold configured to house the resistor and provide one or more cooling media for communication through the resistor,

wherein the resistor comprises:

first and second electrical terminals that are spaced apart from each other, each electrical terminal comprising a plurality of connection points;

a first substantially planar resistor element having a first end connected to a first one of the connection points of the first electrical terminal and a second end connected to a first one of the connection points of the second electrical terminal, the first resistor element configured to directly contact the one or more cooling media on at least two surfaces of the first resistor element in order to transfer heat away from the first resistor element; and

a second substantially planar resistor element having a first end connected to a second one of the connection points of the first electrical terminal and a second end connected to a second one of the connection points of the second electrical terminal, the second resistor element configured to directly contact the one or more cooling media on at least two surfaces of the second resistor element in order to transfer heat away from the second resistor element.

9. The resistor system of claim 8 , wherein the manifold comprises:

a first cavity configured to receive the one or more cooling media from an inlet port; and

a second cavity configured to transfer the one or more cooling media to an outlet port.

10. The resistor system of claim 9 , wherein at least the first electrical terminal and the second electrical terminal form a media channel configured to receive the one or more cooling media from the first cavity, permit communication of the one or more cooling media across the first and second resistor elements, and provide the one or more cooling media to the second cavity.

11. The resistor system of claim 8 , wherein:

the at least two surfaces of the first resistor element are disposed on opposing sides of the first resistor element; and

the at least two surfaces of the second resistor element are disposed on opposing sides of the second resistor element.

12. The resistor system of claim 8 , wherein:

when a voltage drop occurs across the first resistor element, the first resistor element is configured to transfer heat to the one or more cooling media via the at least two surfaces of the first resistor element; and

when a voltage drop occurs across the second resistor element, the second resistor element is configured to transfer heat to the one or more cooling media via the at least two surfaces of the second resistor element.

13. The resistor system of claim 8 , wherein:

an area of each of the at least two surfaces of the first resistor element is greater than an area of each remaining surface of the first resistor element; and

an area of each of the at least two surfaces of the second resistor element is greater than an area of each remaining surface of the second resistor element.

14. The resistor system of claim 8 , wherein each of the at least two surfaces of the first resistor element and each of the at least two surfaces of the second resistor element comprises a ruthenium (IV) oxide (RuO 2 ) film.

15. The resistor system of claim 8 , wherein:

the at least two surfaces of the first resistor element are separated by a first substrate; and

the at least two surfaces of the second resistor element are separated by a second substrate.

16. A method comprising:

receiving one or more cooling media by an inlet of a channel of a resistor, the channel between a first electrical terminal and a second electrical terminal of the resistor, the first and second electrical terminals spaced apart from each other, each electrical terminal comprising a plurality of connection points;

permitting direct contact between the one or more cooling media and at least a first surface and a second surface of a first substantially planar resistor element of the resistor, the first resistor element having a first end connected to a first one of the connection points of the first electrical terminal and a second end connected to a first one of the connection points of the second electrical terminal;

permitting direct contact between the one or more cooling media and at least a first surface and a second surface of a second substantially planar resistor element of the resistor, the second resistor element having a first end connected to a second one of the connection points of the first electrical terminal and a second end connected to a second one of the connection points of the second electrical terminal; and

communicating the one or more cooling media to an outlet of the channel of the resistor after permitting the direct contact between (i) the one or more cooling media and at least the first surface and the second surface of the first resistor element of the resistor and (ii) the one or more cooling media and at least the first surface and the second surface of the second resistor element of the resistor.

17. The method of claim 16 , wherein:

the first and second surfaces of the first resistor element are disposed on opposing sides of the first resistor element; and

the first and second surfaces of the second resistor element are disposed on opposing sides of the second resistor element.

18. The method of claim 16 , wherein:

an area of each the first and second surfaces of the first resistor element is greater than an area of each remaining surface of the first resistor element; and

an area of each of the first and second surfaces of the second resistor element is greater than an area of each remaining surface of the second resistor element.

19. The method of claim 16 , wherein each of the first and second surfaces of the first resistor element and each of the first and second surfaces of the second resistor element comprises a ruthenium (IV) oxide (RuO 2 ) film.

20. The method of claim 16 , wherein:

the first and second surfaces of the first resistor element are separated by a first substrate; and

the first and second surfaces of the second resistor element are separated by a second substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2016
From: MORICO, PETER D.; JAWORSKI, BRADLEY S
To: RAYTHEON COMPANY
Reel/Frame 037649/0393 →
Continuity (1)
Related Publication 20170221610A1 · Aug 3, 2017