Imaging device including two substrates
An imaging device includes a first substrate, a second substrate, a plurality of connection nodes which electrically connect the first and second substrates, a pixel section arranged on the first substrate and including a plurality of pixels arranged in a matrix form, the plurality of pixels outputting pixel signals according to incident light, a row signal generation circuit arranged on the first substrate or the second substrate and configured to generate row selection signals, a column signal generation circuit arranged on the first substrate and configured to generate column-scanning signals, a block of column-scanning circuits arranged on the first substrate and which sequentially outputs the pixel signals output to every row from the pixels by scanning the columns according to the column-scanning signals, to every column, and a signal-processing circuit arranged on the second substrate and configured to process the pixel signals output from the block of column-scanning circuits.
1. An imaging device, comprising:
a first substrate;
a second substrate;
a plurality of connection nodes which electrically connect the first substrate and the second substrate;
a pixel section arranged on the first substrate and including a plurality of pixels arranged in a matrix form, the plurality of pixels outputting pixel signals according to incident light;
a row signal generation circuit arranged on the first substrate or the second substrate and configured to generate row selection signals which sequentially select the rows in which the pixels outputting the pixel signals are arranged and select each of the rows according to the row selection signals at intervals based on a first frequency;
a column signal generation circuit arranged on the first substrate and configured to generate column-scanning signals scanning a plurality of pixel columns and scan each of the columns according to the column-scanning signals at intervals based on a second frequency higher than the first frequency;
a block of column-scanning circuits arranged on the first substrate and which sequentially output the pixel signals, which are output to every row from the pixels by scanning the columns according to the column-scanning signals, to every column; and
an AD conversion circuit arranged on the second substrate and configured to process the pixel signals output from the block of column-scanning circuits.
2. The imaging device according to claim 1 , wherein the row signal generation circuit is arranged on the first substrate.
3. The imaging device according to claim 2 , wherein
the plurality of connection nodes are configured as a serial peripheral interface, and
a control value controlling a timing at which a state of each of the row selection signals changes is transferred to the first substrate from the second substrate via the serial peripheral interface.
4. The imaging device according to claim 1 , wherein
each of the plurality of connection nodes is arranged at a position corresponding to each of the plurality of pixels arranged in the pixel section, or
each of the plurality of connection nodes is arranged at a position corresponding to every multiple pixels of the plurality of pixels arranged in the pixel section, or
each of the plurality of connection nodes is arranged at a position corresponding to every row of the plurality of pixels arranged in the pixel section, or
each of the plurality of connection nodes is arranged at a position corresponding to every multiple rows of the plurality of pixels arranged in the pixel section, or
each of the plurality of connection nodes is arranged at a position corresponding to every column of the plurality of pixels arranged in the pixel section, or
each of the plurality of connection nodes is arranged at a position corresponding to every multiple columns of the plurality of pixels arranged in the pixel section.
5. The imaging device according to claim 1 , further includes a block of register and counter circuits arranged on the first substrate,
wherein the block of register and counter circuits includes registers and counters which are arranged for the row signal generation circuit and the column signal generation circuit to generate the row selection signals and the column-scanning signals, respectively.