Semiconductor structure and manufacturing method thereof

1. A semiconductor structure, comprising:

a semiconductor substrate;

at least one dielectric layer present on the semiconductor substrate, the dielectric layer having at least one contact hole, wherein the semiconductor substrate has at least one recess communicating with the contact hole, and the recess has a bottom surface and at least one sidewall;

a dielectric spacer liner (DSL) layer present on at least the sidewall of the recess, wherein the DSL layer has an opening that enables communication to the recess in the semiconductor substrate; and

at least one conductor present at least partially in the contact hole and electrically connected to the semiconductor substrate through the opening in the DSL layer.

2. The semiconductor structure of claim 1 , further comprising:

at least one metal semiconductor alloy contact present in the recess, wherein the at least one conductor is electrically connected to the semiconductor substrate through the metal semiconductor alloy contact.

3. The semiconductor structure of claim 2 , wherein the DSL layer is made of a material which prevents an etchant used in formation of the metal semiconductor alloy contact from getting through.

4. The semiconductor structure of claim 1 , wherein the DSL layer is made of silicon oxycarbide (SiOC), silicon oxynitride (SiON), silicon dioxide (SiO 2 ), silicon nitride (SiN), or combinations thereof.

5. The semiconductor structure of claim 1 , wherein the DSL layer is further present on at least one sidewall of the contact hole.

6. The semiconductor structure of claim 1 ,

wherein the semiconductor substrate has a stressor at least partially therein, and the recess is in the stressor.

7. A method for manufacturing a semiconductor structure, the method comprising:

forming at least one dielectric layer on a semiconductor substrate;

forming at least one contact hole in the dielectric layer;

forming at least one recess in the semiconductor substrate, wherein the recess communicates with the contact hole, and the recess has a bottom surface and at least one sidewall;

forming at least one dielectric spacer liner (DSL) layer on at least the sidewall and the bottom surface of the recess;

removing a portion of the DSL layer on the bottom surface of the recess to expose a portion of the semiconductor substrate; and

forming at least one conductor at least partially in the contact hole, wherein the at least one conductor is electrically connected to the exposed portion of the semiconductor substrate.

8. The method of claim 7 , further comprising:

removing oxide on at least the sidewall of the recess before the forming the DSL layer.

9. The method of claim 8 , wherein the oxide is removed physically.

10. The method of claim 8 , wherein the oxide is removed by spattering with an inert gas.

11. The method of claim 8 , wherein the oxide is removed by argon spattering.

12. The method of claim 7 , further comprising:

forming a metal containing material in at least the recess;

converting a first portion of the metal containing material and the portion of the semiconductor substrate into a metal semiconductor alloy contact; and

removing a second portion of the metal containing material that is not converted to the metal semiconductor alloy contact.

13. The method of claim 12 , wherein the DSL layer is made of a material which prevents an etchant used in the removing the second portion of the metal containing material from passing through the DSL layer.

14. The method of claim 7 , wherein the DSL layer is made of silicon oxycarbide (SiOC), silicon oxynitride (SiON), silicon dioxide (SiO 2 ), silicon nitride (SiN), or combinations thereof.

15. The method of claim 7 , wherein the forming the DSL layer further forms the DSL layer on at least one sidewall of the contact hole.