IP Library › Granted Patent US 9,954,087
Granted Patent B2
US 9,954,087 · App. 14/470,403 · Granted Apr 24, 2018

Field effect transistor, and multilayered epitaxial film for use in preparation of field effect transistor

Inventors: Takashi Inoue (Tokyo, JP); Tatsuo Nakayama (Tokyo, JP); Yuji Ando (Tokyo, JP); Yasuhiro Murase (Tokyo, JP); Kazuki Ota (Tokyo, JP); Hironobu Miyamoto (Tokyo, JP); Katsumi Yamanoguchi (Tokyo, JP); Naotaka Kuroda (Tokyo, JP); Akio Wakejima (Tokyo, JP); Yasuhiro Okamoto (Tokyo, JP)
Assignee: RENESAS ELECTRONICS CORPORATION
H01L29/7783H01L29/0607H01L29/155H01L29/2003H01L29/205H01L29/42316H01L29/7787
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Quick Facts
Patent No.
US 9,954,087
App. No.
14/470,403
Granted
Apr 24, 2018
Kind
B2
Abstract

In a group III nitride-type field effect transistor, the present invention reduces a leak current component by conduction of residual carriers in a buffer layer, and achieves improvement in a break-down voltage, and enhances a carrier confinement effect (carrier confinement) of a channel to improve pinch-off characteristics (to suppress a short channel effect). For example, when applying the present invention to a GaN-type field effect transistor, besides GaN of a channel layer, a composition-modulated (composition-gradient) AlGaN layer in which aluminum composition reduces toward a top gradually or stepwise is used as a buffer layer (hetero buffer). To gate length Lg of a FET to be prepared, a sum a of layer thicknesses of an electron supply layer and a channel layer is selected so as to fulfill Lg/a≥5, and in such a case, the layer thickness of the channel layer is selected in a range of not exceeding 5 times (about 500 Å) as long as a de Broglie wavelength of two-dimensional electron gas accumulated in the channel layer in room temperature.

Claims (22)

1. A semiconductor device comprising:

a substrate;

a multilayered epitaxial grown layer formed on the substrate and having:

an AlGaN buffer layer;

a GaN channel layer formed on the AlGaN buffer layer; and

an AlGaN electron supply layer formed on the GaN channel layer;

source and drain electrodes formed on a surface of the AlGaN electron supply layer; and

a gate electrode formed on the surface of the AlGaN electron supply layer between the source and drain electrodes,

wherein an Al composition of the AlGaN buffer layer positioned at vicinity of the GaN channel layer is relatively lower than an Al composition of the AlGaN buffer layer positioned at vicinity of the substrate,

wherein the substrate includes a substrate having high resistibility at room temperature and an AlN nucleation layer on the substrate having high resistibility,

wherein a thickness of the AlN nucleation layer is selected in a range of 40 nanometers to 100 nanometers,

wherein the AlGaN buffer layer is made of AlGaN epitaxially grown on the AlN nucleation layer, and

wherein, at an interface of the AlGaN buffer layer and the AlN nucleation layer, the AlN nucleation layer has an unstrained lattice constant in an a-axis direction of AlN, and a compressively strained lattice constant in an a-axis direction of the AlGaN buffer layer epitaxially grown on the AlN nucleation layer is identical to the unstrained lattice constant in the a-axis direction of the AlN nucleation layer.

2. The semiconductor device according to claim 1 , wherein an Al composition of the AlGaN buffer layer is monotonically reduced in a direction from the substrate toward the GaN channel layer.

3. The semiconductor device according to claim 1 , wherein an Al composition of the AlGaN buffer layer is reduced in a stepwise manner in a direction from the substrate toward the GaN channel layer.

4. The semiconductor device according to claim 1 , wherein the AlGaN electron supply layer has a recessed portion between the source and drain electrodes, and wherein a portion of the gate electrode is formed in the recessed portion of the AlGaN electron supply layer.

5. The semiconductor device according to claim 1 , wherein the substrate having high resistibility at room temperature is a silicon carbide substrate having high resistibility at room temperature.

6. The semiconductor device according to claim 1 , further comprising:

an InAlGaN channel back barrier layer formed between the AlGaN buffer layer and the GaN channel layer,

wherein an energy discontinuity ΔE c of a conduction band edge between the InAlGaN channel back barrier layer and the GaN channel layer is selected to be at least 200 meV,

wherein the InAlGaN channel back barrier layer is made of InAlGaN epitaxially grown on the AlGaN buffer layer, and

wherein, at the interface of the InAlGaN channel back barrier layer and the AlGaN buffer layer, a lattice constant in an a-axis direction of the InAlGaN epitaxially grown on the AlGaN buffer layer is identical to the lattice constant in the a-axis direction of the AlGaN buffer layer.

Assignments (1)
CHANGE OF ADDRESS Recorded Mar 9, 2018
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 045541/0259 →
Priority Claims (2)
JP 2005-380137 · Dec 28, 2005 · national
JP 2006-121042 · Apr 25, 2006 · national
Continuity (2)
Continuation 12159599
Related Publication 20140367743A1 · Dec 18, 2014