Packaging structure, packaging method and template used in packaging method
Disclosed are a packaging structure, a packaging method and a template used in packaging method. The packaging structure comprises: a substrate; a chip mounted on the substrate; bonding wires for electrically connecting the substrate to the chip; and a protective layer which is formed on the substrate and is used for covering the chip, the bonding wires and bonding pads connected to the bonding wires, the size of the protective layer being smaller than that of the substrate. The packaging structure, the packaging method and the template used in packaging method can solve the problems in the prior art of the great difficulty in designing a mold chase, a complicated molding process, a high manufacturing cost and a high molding material consumption.
1. A packaging method, comprising:
providing a substrate;
mounting a plurality of chips on the substrate;
for each of the plurality of chips, executing steps of:
electrically connecting the substrate with the chips via bonding wires through a wire bonding process;
coating a surface coating material on the bottom surface of a template;
placing the template on the substrate, the template having a cavity configured to expose entire chips, the bonding wires, and bonding pads connected with the bonding wires, the height of the template is higher than the height of the bonding wires, and a plurality of holes are formed in the template except for the cavity;
filling into the cavity an epoxy encapsulation material through an adhesive dispensing process, and forming a protective layer by executing a curing process of the epoxy encapsulation material;
cleaning the surface coating material with an organic solvent; and
removing the template;
wherein
a solder ball array is formed on the bottom surface of the substrate through a ball mounting process; and
cutting through the substrate by a singulation process so as to target each of the plurality of chips to form a packaging structure.
2. A template used in the packaging method according to claim 1 , wherein the template has a cavity configured to expose the chip, the bonding wires, and the bonding pads connected with the bonding wires, and the height of the template is higher than the height of the bonding wires, wherein a plurality of holes are formed in the template except for the cavity.