Wiring substrate with buried substrate having linear conductors
A wiring substrate includes a buried substrate disposed within a through-hole penetrating through a resin substrate of a core layer and including a plate-like body and a plurality of linear conductors penetrating the plate-like body, a first insulating layer covering a first surface of the resin substrate, a first wiring layer including a first pad pattern formed on a first surface of the buried substrate and a first wiring pattern formed on a first surface of the first insulating layer, and a third wiring pattern formed on the first surface of the resin substrate and covered by the first insulating layer. In the plurality of linear conductors, a gap between the adjacent linear conductors is smaller than a diameter of each of the linear conductors. The third wiring pattern is formed so as to have a thickness thicker than a thickness of the first wiring pattern.
1. A wiring substrate comprising:
a core layer including a resin substrate and a through-hole penetrating through the resin substrate in a thickness direction;
a buried substrate including a plate-like body and a plurality of linear conductors penetrating the plate-like body in the thickness direction, the buried substrate being disposed within the through-hole of the core layer;
a first insulating layer covering a first surface of the resin substrate;
a first pad pattern formed on a first surface of the buried substrate; and
a third wiring pattern formed on the first surface of the resin substrate and covered by the first insulating layer,
wherein
in the plurality of linear conductors, a gap between the adjacent linear conductors is smaller than a diameter of each of the linear conductors,
a thickness of the third wiring pattern is greater than a thickness of the first pad pattern,
the first insulating layer comprises a first layer covering the first surface of the resin substrate and an outer peripheral portion of the first surface of the buried substrate, and exposing the first pad pattern and an inner portion of the first surface of the buried substrate, the inner portion of the first surface of the buried substrate being disposed within the outer peripheral portion of the first surface of the buried substrate, and a second layer covering the first pad pattern and extending on the first layer,
the wiring substrate further comprises: a fifth wiring pattern formed on the second layer, the fifth wiring pattern connected to the first pad pattern and connected to the third wiring pattern, and
the first layer is disposed in a space between an inner wall surface of the through-hole and a side wall of the buried substrate, and covers side surfaces of the buried substrate.
2. The wiring substrate according to claim 1 , wherein
the third wiring pattern is exposed within an opening portion formed at the first layer, and the second layer is formed so that it is filled within the opening portion, and
the wiring substrate further comprises:
a via formed in a via hole penetrating through the second layer filled within the opening portion, the via connecting the third wiring pattern and the fifth wiring pattern.
3. The wiring substrate according to claim 1 , wherein the first layer is made of a photosensitive insulating resin.
4. The wiring substrate according to claim 1 , comprising:
a second insulating layer covering a second surface of the resin substrate;
a second pad pattern formed on a second surface of the buried substrate; and
a fourth wiring pattern formed on the second surface of the resin substrate and covered by the second insulating layer, wherein
the first pad pattern and the second pad pattern are disposed opposite to each other via the buried substrate and are connected to each other via the plurality of linear conductors.
5. The wiring substrate according to claim 4 , further comprising:
a second wiring layer including a second wiring pattern formed on a second surface of the second insulating layer.
6. The wiring substrate according to claim 4 , wherein:
the second insulating layer comprises a third layer covering the second surface of the resin substrate and an outer peripheral portion of the second surface of the buried substrate, and exposing the second pad pattern and an inner portion of the second surface of the buried substrate, the inner portion of the second surface of the buried substrate being disposed within the outer peripheral portion of the second surface of the buried substrate, and a fourth layer covering the second pad pattern and extending on the third layer, and
the wiring substrate further comprises:
a sixth wiring pattern formed on the fourth layer, the sixth wiring pattern being connected to the second pad pattern through a via extending through the fourth layer and connected to the fourth wiring pattern through a via extending through the third layer and the fourth layer.
7. A semiconductor package comprising:
the wiring substrate according to claim 1 ; and
a semiconductor chip electrically connecting to an outermost wiring layer in the wiring substrate.
8. The wiring substrate according to claim 4 , wherein the first insulating layer and the second insulating layer are made of different resins.
9. The wiring substrate according to claim 1 , wherein the inner portion of the first surface of the buried substrate is a continuous region exposed from the first layer, and disposed within the outer peripheral portion of the first surface of the buried substrate covered by the first layer, and a surface area of the inner portion of the first surface of the buried substrate is greater than a surface area of the outer peripheral portion of the first surface of the buried substrate.
10. The wiring substrate according to claim 6 , wherein
the inner portions of the first surface and the second surface of the buried substrate are continuous regions respectively exposed from the first layer and the second layer, and are disposed within respective outer peripheral portions of the first surface and the second surface of the buried substrate respectively covered by the first layer and the second layer, and a surface area of each of the inner portions of the first and second surfaces of the buried substrate is greater than a surface area of each of the respective outer peripheral portions of the first surface and the second surface of the buried substrate.