System and method for conserving energy in non-volatile dual inline memory modules

1. A computer-implemented method for controlling power consumption in a non-volatile dual inline memory module (NVDIMM-N) comprising:

determining, via a processor, whether the NVDIMM-N is receiving power from a main power source;

inactivating, via the processor, a data bus connected to an NVDIMM-N memory group responsive to determining that the NVDIMM-N is not receiving power from the main power source;

backing up data stored in the NVDIMM-N memory group, via the processor, to a non-volatile memory module integrated with the NVDIMM-N, wherein an NVDIMM-N controller can access the NVDIMM-N memory group while backing up; and

transmitting, via the processor, a low power command and a restore command to an NVDIMM-N controller to place the NVDIMM-N memory group in a low power mode; wherein the restore command is indicative that NVDIMM-N memory group comprises a load memory buffer (LMB) configured to access a plurality of memory ranks and memory banks on the NVDIMM-N.

2. The computer-implemented method of claim 1 further comprising:

determining, via the processor, whether the NVDIMM-N is receiving power from the main power source;

activating the data bus connected to the NVDIMM-N memory group;

transmitting, via the processor, the restore command to the NVDIMM-N controller responsive to determining that the NVDIMM-N is receiving power from the main power source; and

restoring data stored on the non-volatile memory module to the NVDIMM-N memory group based on a command from the NVDIMM-N controller.

3. The computer-implemented method of claim 2 , wherein the NVDIMM-N controller can access the NVDIMM-N memory group while restoring the data stored on the non-volatile memory module.

4. The computer-implemented method of claim 2 , wherein the restore command is a partial restore command indicative that NVDIMM-N memory group comprises the LMB.

5. The computer-implemented method of claim 1 , wherein the NVDIMM-N memory group comprises a NVDIMM-N memory rank.

6. The computer-implemented method of claim 1 , wherein the NVDIMM-N memory group comprises a NVDIMM-N memory bank and a plurality of bank groups.

7. The computer-implemented method of claim 1 , wherein the low power command includes instructions for a partial backup process, the partial backup process comprising:

determining, via the processor, whether the NVDIMM-N memory group is idle;

commanding, via the processor, the NVDIMM-N memory group to go into a low power mode; and

updating, via the processor, an energy mode status table with information indicative of the NVDIMM-N memory group responsive to determining that the NVDIMM-N memory group is idle.

8. The computer-implemented method of claim 7 , further comprising:

determining, via the processor, whether the NVDIMM-N is receiving power from the main power source;

activating, via the processor, the data bus connected to the NVDIMM-N memory group;

transmitting, via the processor, a restore command to the NVDIMM-N controller responsive to determining that the NVDIMM-N is receiving power from the main power source; and

restoring, via the processor, data stored on the non-volatile memory module to the NVDIMM-N memory group based on a command from the NVDIMM-N controller.

9. A system for controlling power consumption in a non-volatile dual inline memory module (NVDIMM-N) comprising a processor configured to:

determine whether the NVDIMM-N is receiving power from a main power source;

inactivate a data bus connected to an NVDIMM-N memory group responsive to determining that the NVDIMM-N is not receiving power from the main power source;

backup data stored in the NVDIMM-N memory group, via the processor, to a non-volatile memory module integrated with the NVDIMM-N, wherein an NVDIMM-N controller can access the NVDIMM-N memory group while backing up; and

transmit a low power command and a partial restore command to an NVDIMM-N controller to place the NVDIMM-N memory group in a low power mode; wherein the partial restore command is indicative that NVDIMM-N memory group comprises a load memory buffer (LMB) configured to access a plurality of memory ranks and memory banks on the NVDIMM-N.

10. A system of claim 9 further comprising:

determining, via the processor, whether the NVDIMM-N is receiving power from the main power source;

activating the data bus connected to the NVDIMM-N memory group;

transmitting, via the processor, the restore command to the NVDIMM-N controller responsive to determining that the NVDIMM-N is receiving power from the main power source; and

restoring data stored on the non-volatile memory module to the NVDIMM-N memory group based on a command from the NVDIMM-N controller.

11. A system of claim 10 , wherein the NVDIMM-N controller can access the NVDIMM-N memory group while restoring the data stored on the non-volatile memory module.

12. A system of claim 10 , wherein the restore command is a partial restore command indicative that the NVDIMM-N memory group comprises the LMB.

13. A system of claim 9 , wherein the NVDIMM-N memory group comprises a NVDIMM-N memory rank.

14. A system of claim 9 , wherein the NVDIMM-N memory group comprises a NVDIMM-N memory bank and a plurality of bank groups.

15. A system of claim 9 , wherein the low power command includes instructions for a partial backup process, the processor is configured to:

determine whether the NVDIMM-N memory group is idle;

command the NVDIMM-N memory group to go into a low power mode; and

update an energy mode status table with information indicative of the NVDIMM-N memory group responsive to determining that the NVDIMM-N memory group is idle.

16. The system of claim 15 , wherein the processor is further configured to:

determine whether the NVDIMM-N is receiving power from the main power source;

activate the data bus connected to the NVDIMM-N memory group;

transmit a restore command to the NVDIMM-N controller responsive to determining that the NVDIMM-N is receiving power from the main power source; and

restore data stored on the non-volatile memory module to the NVDIMM-N memory group based on a command from the NVDIMM-N controller.

17. A non-transitory storage medium may include program instructions that are executable by a processor to perform a method for controlling power consumption in a non-volatile dual inline memory module (NVDIMM-N), the method comprising:

determining, via a processor, whether the NVDIMM-N is receiving power from a main power source;

inactivating, via the processor, a data bus connected to an NVDIMM-N memory group responsive to determining that the NVDIMM-N is not receiving power from the main power source;

backing up data stored in the NVDIMM-N memory group, via the processor, to a non-volatile memory module integrated with the NVDIMM-N, wherein an NVDIMM-N controller can access the NVDIMM-N memory group while backing up; and

transmitting, via the processor, a low power command and a partial restore command to an NVDIMM-N controller to place the NVDIMM-N memory group in a low power mode; wherein the partial restore command is indicative that NVDIMM-N memory group comprises a load memory buffer (LMB) configured to access a plurality of memory ranks and memory banks on the NVDIMM-N.

18. The non-transitory storage medium of claim 17 , further comprising:

determining, via the processor, whether the NVDIMM-N is receiving power from the main power source;

activating the data bus connected to the NVDIMM-N memory group;

transmitting, via the processor, a restore command to the NVDIMM-N controller responsive to determining that the NVDIMM-N is receiving power from the main power source; and

restoring data stored on the non-volatile memory module to the NVDIMM-N memory group based on a command from the NVDIMM-N controller.

19. The non-transitory storage medium of claim 18 , wherein the NVDIMM-N controller can access the NVDIMM-N memory group while restoring the data stored on the non-volatile memory module.

20. The non-transitory storage medium of claim 17 , wherein the NVDIMM-N memory group comprises a NVDIMM-N memory rank.