System and method for interleaving digital audio signal including PWM signal and digital audio processing device employing the same

1. A method for interleaving a digital audio signal including a first PWM signal having a carrier frequency of f, the method comprising:

(a) generating a second PWM signal having a carrier frequency of f/m by dividing the carrier frequency of the first PWM signal by m;

(b) generating a third PWM signal by extracting (2×m×n+1) th frame through (2×m×n+m) th frame from the first PWM signal and (2n+2) th frame from the second PWM signal; and

(c) reproducing the digital audio signal by driving a switch with the third PWM signal (where m=2 k , and each of n and k is an integer equal to or greater than 0).

2. The method of claim 1 , wherein the step (b) comprises:

(b-1) extracting the (2×m×n+1) th frame through the (2×m×n+m) th frame from the first PWM signal and the (2n+2) th frame from the second PWM signal for each value of n; and

(b-2) interleaving the (2×m×n+1) th frame through the (2×m×n+m) th frame of the first PWM signal and the (2n+2) th frame of the second PWM signal to generate the third PWM signal.

3. The method of claim 1 , wherein m=2, and the step (b) comprises:

(b-1) extracting: first frame and second frame; fifth frame and sixth frame; ninth frame and tenth frame; and thirteenth frame and fourteenth frame from the first PWM signal;

(b-2) extracting: second frame; fourth frame; sixth frame; and eighth frame from the second PWM signal; and

(b-3) sequentially arranging: the first frame and the second frame of the first PWM signal; the second frame of the second PWM signal; the fifth frame and the sixth frame of the first PWM signal; the fourth frame of the second PWM signal; the ninth frame and the tenth frame of the first PWM signal; the sixth frame of the second PWM signal; the thirteenth frame and the fourteenth frame of the first PWM signal; and the eighth frame of the second PWM signal to generate the third PWM signal.

4. The method of claim 1 , wherein m=4, and the step (b) comprises:

(b-1) extracting: first frame through fourth frame; ninth frame through twelfth frame; seventeenth frame through twentieth frame; and twenty-fifth frame through twenty-eighth frame from the first PWM signal;

(b-2) extracting: second frame; fourth frame; sixth frame; and eighth frame from the second PWM signal; and

(b-3) sequentially arranging: the first frame through the fourth frame of the first PWM signal; the second frame of the second PWM signal; the ninth frame through the twelfth frame of the first PWM signal; the fourth frame of the second PWM signal; the seventeenth frame through the twentieth frame of the first PWM signal; the sixth frame of the second PWM signal; the twenty-fifth frame through the twenty-eighth frame of the first PWM signal; and the eighth frame of the second PWM signal to generate the third PWM signal.

5. The method of claim 1 , wherein m=8, and the step (b) comprises:

(b-1) extracting first frame through eighth frame; seventeenth frame through twenty-fourth frame; thirty-third frame through fortieth frame; and forty-ninth frame through fifty-sixth frame from the first PWM signal;

(b-2) extracting second frame; fourth frame; sixth frame; and eighth frame from the second PWM signal; and

(b-3) sequentially arranging: the first frame through the eighth frame of the first PWM signal; the second frame of the second PWM signal; the seventeenth frame through the twenty-fourth frame of the first PWM signal; the fourth frame of the second PWM signal; the thirty-third frame through the fortieth frame of the first PWM signal; the sixth frame of the second PWM signal; the forty-ninth frame through the fifty-sixth frame of the first PWM signal; and the eight frame of the second PWM signal, to generate the third PWM signal.

6. A method for interleaving a digital audio signal including a first PWM signal having a period of T 1 , the method comprising:

(a) generating a second PWM signal having a period of T 2 by frequency-dividing the first PWM signal by m;

(b) extracting, from the first PWM signal, (2×m×n+1) th frame through (2×m×n+m) th frame wherein a sum of durations of the (2×m×n+1) th frame through the (2×m×n+m) th frame corresponding to the period of T 2 ;

(c) extracting (2n+2) th frame from the second PWM signal;

(d) generating the third PWM signal having the period of (m×T 1 +T 2 ) by interleaving the (2×m×n+1) th frame through the (2×m×n+m) th frame of the first PWM signal and the (2n+2) th frame of the second PWM signal; and

(e) reproducing the digital audio signal by driving a switch with the third PWM signal (where T 2 =m×T 1 , m=2 k and each of n and k is an integer equal to or greater than 0).

7. The method of claim 6 , wherein the (2×m×n+1) th frame through the (2×m×n+m) th frame of the first PWM signal and the (2n+2) th frame of the second PWM signal are extracted for each value of n in the steps (b) and (c), respectively, and

the (2×m×n+1) th frame through the (2×m×n+m) th frame of the first PWM signal and the (2n+2) th frame of the second PWM signal are interleaved in the step (d) to generate the third PWM signal.

8. The method of claim 6 , wherein m=2, and

wherein the step (b) comprises extracting: first frame and second frame; fifth frame and sixth frame; ninth frame and tenth frame; and thirteenth frame and fourteenth frame from the first PWM signal;

the step (c) comprises extracting: second frame; fourth frame; sixth frame; and eighth frame from the second PWM signal; and

the step (d) comprises sequentially arranging: the first frame and second frame of the first PWM signal; the second frame of the second PWM signal; the fifth frame the sixth frame of the first PWM signal; the fourth frame of the second PWM signal; the ninth frame the tenth frame of the first PWM signal; the sixth frame of the second PWM signal; the thirteenth frame and fourteenth frame of the first PWM signal; and eighth frame of the second PWM signal to generate the third PWM signal.

9. The method of claim 6 , wherein m=4, and

wherein the step (b) comprises extracting: first frame through fourth frame; ninth frame through twelfth frame; seventeenth frame through twentieth frame; and twenty-fifth frame through twenty-eighth frame from the first PWM signal;

the step (c) comprises extracting: second frame; fourth frame; sixth frame; and eighth frame from the second PWM signal; and

the step (d) comprises sequentially arranging: the first frame through the fourth frame of the first PWM signal; the second frame of the second PWM signal; the ninth frame through the twelfth frame of the first PWM signal; the fourth frame of the second PWM signal; the seventeenth frame through the twentieth frame of the first PWM signal; the sixth frame of the second PWM signal; the twenty-fifth frame through the twenty-eighth frame of the first PWM signal; and the eighth frame of the second PWM signal to generate the third PWM signal.

10. The method of claim 6 , wherein m=8, and

wherein the step (b) comprises extracting: first frame through eighth frame; seventeenth frame through twenty-fourth frame; thirty-third frame through fortieth frame; and forty-ninth frame through fifty-sixth frame from the first PWM signal in (b);

the step (c) comprises extracting: second frame; fourth frame; sixth frame; and eighth frame from the second PWM signal; and

the step (d) comprises sequentially arranging: the first frame through the eighth frame of the first PWM signal; the second frame of the second PWM signal; the seventeenth frame through the twenty-fourth frame of the first PWM signal; the fourth frame of the second PWM signal; the thirty-third frame through the fortieth frame of the first PWM signal; the sixth frame of the second PWM signal; the forty-ninth frame through the fifty-sixth frame of the first PWM signal; and eighth frame of the second PWM signal to generate the third PWM signal.

11. A system for interleaving a digital audio signal including a first PWM signal having a carrier frequency of f, the system comprising:

a frequency divider configured to divide the carrier frequency of the first PWM signal by m to generate a second PWM signal having a carrier frequency of f/m;

a frame extracting unit configured to extract (2×m×n+1) th frame through (2×m×n+m) th frame from the first PWM signal and (2n+2) th frame from the second PWM signal;

a frame arranging unit configured to interleave the (2×m×n+1) th frame through the (2×m×n+m) th frame of the first PWM signal and the (2n+2) th frame of the second PWM signal extracted by the frame extracting unit to generate a third PWM signal; and

a switch unit driven by the third PWM signal (where m=2 k and each of n and k is an integer equal to or greater than 0).

12. The system of claim 11 , wherein the frame extracting unit is configured to extract, for each value of n, the (2×m×n+1) th frame through the (2×m×n+m) th frames from the first PWM signal and the (2n+2) th frame from the second PWM signal, and

the frame arranging unit is configured to interleave the (2×m×n+1) th frame through the (2×m×n+m) th frame of the first PWM signal and the (2n+2) th frame of the second PWM signal to generate the third PWM signal.

13. The system of claim 11 , wherein m=2, and

wherein the frame extracting unit is configured to extract: first frame and second frame; fifth frame and sixth frame; ninth frame and tenth frame; and thirteenth frame and fourteenth frame from the first PWM signal, and second frame; fourth frame; sixth; and eighth frame from the second PWM signal frame, and

the frame arranging unit is configured to sequentially arrange: the first frame and the second frame of the first PWM signal; the second frame of the second PWM signal; the fifth frame and the sixth frame of the first PWM signal; the fourth frame of the second PWM signal; the ninth frame and the tenth frame of the first PWM signal; the sixth frame of the second PWM signal; the thirteenth frame and the fourteenth frame of the first PWM signal; and the eighth frame of the second PWM signal to generate the third PWM signal.

14. The system of claim 11 , wherein m=4, and

wherein the frame extracting unit is configured to extract: a first frame through fourth frame, ninth frame through twelfth frame, seventeenth frame through twentieth frame, and twenty-fifth frame through twenty-eighth frame from the first PWM signal, and second frame; fourth frame; sixth frame; and eighth frame from the second PWM signal, and

the frame arranging unit is configured to sequentially arrange: the first frame through the fourth frame of the first PWM signal; the second frame of the second PWM signal; the ninth frame through the twelfth frame of the first PWM signal; the fourth frame of the second PWM signal; the seventeenth frame through the twentieth frame of the first PWM signal; the sixth frame of the second PWM signal; the twenty-fifth frame through the twenty-eighth frame of the first PWM signal; and the eighth frame of the second PWM signal to generate the third PWM signal.

15. The system of claim 11 , wherein m=8,

the frame extracting unit is configured to extract: first frame through eighth frame, seventeenth frame through twenty-fourth frame, thirty-third frame through fortieth frame; and forty-ninth frame through fifty-sixth frame from the first PWM signal, and second frame; fourth frame; sixth frame; and eighth frame from the second PWM signal, and

the frame arranging unit is configured to sequentially arrange: the first frame through the eighth frame of the first PWM signal; the second frame of the second PWM signal; the seventeenth frame through the twenty-fourth frame of the first PWM signal; the fourth frame of the second PWM signal; the thirty-third frame through the fortieth frame of the first PWM signal; the sixth frame of the second PWM signal; the forty-ninth frame through the fifty-sixth frame of the first PWM signal; and eighth frame of the second PWM signal to generate the third PWM signal.

16. A digital audio processing device comprising: a memory; a program stored in the memory; and a processor configured to execute an instruction included in the program, wherein the program comprises:

a first instruction for generating a second PWM signal having a carrier frequency of Um by frequency-dividing a first PWM signal having a carrier frequency of f;

a second instruction for extracting (2×m×n+1) th frame through (2×m×n+m) th frame from the first PWM signal and (2n+2) th frame from the second PWM signal;

a third instruction for generating a third PWM signal by interleaving the (2×m×n+1) th frame through the (2×m×n+m) th frame of the first PWM signal and the (2n+2) th frame of the second PWM signal; and

a fourth instruction for driving a switch with the third PWM signal (where m=2 k and each of n and k is an integer equal to or greater than 0).

17. The digital audio processing device of claim 16 , wherein the second instruction comprises: a first sub-instruction for extracting, for each value of n, the (2×m×n+1) th frame through the (2×m×n+m) th frame from the first PWM signal; and a second sub-instruction for extracting, for each value of n, the (2n+2) th frame from the second PWM signal, and

the third instruction comprises a sub-instruction for interleaving the (2×m×n+1) th frame through the (2×m×n+m) th frame of the first PWM signal and the (2n+2) th frame of the second PWM signal to generate the third PWM signal.

18. A method for interleaving a digital audio signal including a first PWM signal having a carrier frequency of f, the method comprising:

(a) generating a second PWM signal having a carrier frequency of f/m by frequency-dividing the first PWM signal;

(b) generating a third PWM signal by extracting (2n+1) th frame from the second PWM signal and (2×m×n+m+1) th frame through (2×m×n+2m) th frame from the first PWM signal; and

(c) reproducing the digital audio signal by driving a switch with the third PWM signal (where m=2 k and each of n and k is an integer equal to or greater than 0).

19. A method for interleaving a digital audio signal including a first PWM signal having a period of T 1 , the method comprising:

(a) generating a second PWM signal having a period of T 2 by frequency-dividing the first PWM signal by m;

(b) extracting (2n+2) th frame from the second PWM signal;

(c) extracting, from the first PWM signal, (2×m×n+1) th frame through (2×m×n+m) th frame wherein a sum of durations of the (2×m×n+1) th frame through the (2×m×n+m) th frame corresponding to the period of T 2 ;

(d) generating the third PWM signal having the period of (m×T 1 +T 2 ) by interleaving (2n+1) th frame of the second PWM signal and (2×m×n+m+1) th frame through (2×m×n+2m) th frame of the first PWM signal; and

(e) reproducing the digital audio signal by driving a switch with the third PWM signal (where T 2 =m×T 1 , m=2 k , and each of n and k is an integer equal to or greater than 0).