IP Library Granted Patent US 9,978,171
Granted Patent B2
US 9,978,171 · App. 14/810,178 · Granted May 22, 2018

Control of a sample mask from a fragment shader program

Inventors: Jeffrey Alan Bolz (Austin, TX); Eric B. Lum (San Jose, CA); Rui Manuel Bastos (Porto Alegre, BR)
Assignee: NVIDIA Corporation
G06T15/80G06T1/20G06T1/60G06T15/005
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Quick Facts
Patent No.
US 9,978,171
App. No.
14/810,178
Granted
May 22, 2018
Kind
B2
Abstract

A method, system, and computer program product for controlling a sample mask from a fragment shader are disclosed. The method includes the steps of generating a fragment for each pixel that is covered, at least in part, by a primitive and determining coverage information for each fragment corresponding to the primitive. Then, for each fragment, the method includes the steps of generating a sample mask by a fragment shader, replacing the coverage information for the fragment with the sample mask, and writing, based on the sample mask, a result generated by the fragment shader to a memory. The method may be implemented on a parallel processing unit configured to implement, at least in part, a graphics processing pipeline.

Claims (44)

1. A method, comprising:

generating a fragment for each pixel that is covered, at least in part, by a primitive;

determining coverage information for each fragment corresponding to the primitive; and

for each fragment:

generating, by a fragment shader, a sample mask that indicates a first sample of a first pixel is covered, wherein, according to the coverage information, the first sample of the first pixel is not covered by the primitive,

replacing the coverage information for the fragment with the sample mask, and

writing, based on the sample mask, a result generated by the fragment shader to a memory.

2. The method of claim 1 , wherein a fragment comprises a data structure that includes one or more interpolated attributes as well as the sample mask related to a plurality of samples, including the first sample, associated with the first pixel.

3. The method of claim 1 , wherein generating the fragment and determining coverage information are performed during a rasterization stage of a graphics processing pipeline.

4. The method of claim 3 , wherein the graphics processing pipeline is implemented, at least in part, by a parallel processing unit that includes a plurality of programmable streaming multiprocessors (SM), each SM configured to execute a plurality of fragment shader threads in parallel.

5. The method of claim 4 , wherein each fragment shader thread corresponds to a different fragment generated during the rasterization stage of the graphics processing pipeline.

6. The method of claim 4 , wherein generating the sample mask is performed during a fragment shading stage of the graphics processing pipeline, and wherein replacing the coverage information with the sample mask is performed during a raster operations stage of the graphics processing pipeline.

7. The method of claim 6 , wherein the parallel processing unit includes a raster engine configured to implement, at least in part, the rasterization stage of the graphics processing pipeline and a raster operations unit configured to implement, at least in part, the raster operations stage of the graphics processing pipeline.

8. The method of claim 1 , wherein the results are written to a multi-sample color buffer.

9. The method of claim 1 , wherein the coverage information comprises an N-bit mask, each bit in the N-bit mask corresponding to a different sample location associated with a pixel corresponding to the fragment.

10. The method of claim 9 , wherein the sample mask comprises N bits, each bit of the sample mask corresponding to the different sample locations.

11. The method of claim 1 , wherein the first sample of a first pixel failed an early z test before determining the coverage information for the first pixel.

12. The method of claim 1 , further comprising, before replacing the coverage information for the fragment with the sample mask,

setting the coverage information for the first pixel to indicate that all of the samples within the first pixel are fully covered; and

combining the coverage information with the sample mask using a bitwise AND.

13. A non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to perform steps comprising:

generating a fragment for each pixel that is covered, at least in part, by a primitive;

determining coverage information for each fragment corresponding to the primitive; and

for each fragment:

generating, by a fragment shader, a sample mask that indicates a first sample of a first pixel is covered, wherein, according to the coverage information, the first sample of the first pixel is not covered by the primitive,

replacing the coverage information for the fragment with the sample mask, and

writing, based on the sample mask, a result generated by the fragment shader to a memory.

14. The non-transitory computer-readable storage medium of claim 13 , wherein a fragment comprises a data structure that includes one or more interpolated attributes as well as the sample mask related to a plurality of samples, including the first sample, associated with the first pixel.

15. The non-transitory computer-readable storage medium of claim 13 , wherein the processor comprises a parallel processing unit that includes a plurality of programmable streaming multiprocessors (SM), each SM configured to execute a plurality of fragment shader threads in parallel, and wherein generating the fragment and determining coverage information are performed during a rasterization stage of a graphics processing pipeline that is implemented, at least in part, by the parallel processing unit.

16. The non-transitory computer-readable storage medium of claim 13 , wherein the coverage information comprises an N-bit mask, each bit in the N-bit mask corresponding to a different sample location associated with a pixel corresponding to the fragment, and wherein the sample mask comprises N bits, each bit of the sample mask corresponding to the different sample locations.

17. A system, comprising:

a parallel processing unit configured to implement, at least in part, a graphics processing pipeline, the parallel processing unit configured render primitives by:

generate a fragment for each pixel that is covered, at least in part, by a primitive,

determine coverage information for each fragment corresponding to the primitive, and

for each fragment:

generate, by a fragment shader, a sample mask that indicates a first sample of a first pixel is covered, wherein, according to the coverage information, the first sample of the first pixel is not covered by the primitive,

replace the coverage information for the fragment with the sample mask, and

write, based on the sample mask, a result generated by the fragment shader to a memory.

18. The system of claim 17 , wherein generating the fragment and determining coverage information are performed during a rasterization stage of the graphics processing pipeline, wherein generating the sample mask is performed during a fragment shading stage of the graphics processing pipeline, and wherein replacing the coverage information with the sample mask is performed during a raster operations stage of the graphics processing pipeline.

19. The system of claim 17 , further comprising:

a memory storing a graphics application and a device driver; and

a host processor coupled to the memory and the parallel processing unit, the host processor configured to execute the graphics application and the device driver,

wherein the device driver implements an extension to a graphics API utilized by the graphics application in order to cause the parallel processing unit to replace the coverage information for the fragment with the sample mask.

20. The system of claim 17 , wherein the parallel processing unit includes a plurality of programmable streaming multiprocessors (SM), each SM configured to execute a plurality of fragment shader threads in parallel.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2015
From: BOLZ, JEFFREY ALAN; LUM, ERIC B.; BASTOS, RUI MANUEL
To: NVIDIA CORPORATION
Reel/Frame 036188/0114 →
Continuity (2)
Provisional Application 62030497 · Jul 29, 2014
Related Publication 20160035129A1 · Feb 4, 2016