Semiconductor device comprising a first gate electrode and a second gate electrode
A semiconductor device includes a transistor. The transistor includes a source region and a drain region disposed adjacent to a first main surface of a semiconductor substrate, a first gate electrode and a second gate electrode, the first gate electrode being disconnected from the second gate electrode. The transistor further includes a body region. The first gate electrode is adjacent to a first portion of the body region and the second gate electrode is adjacent to a second portion of the body region. The transistor further includes first trenches patterning the first portion of the body region into a first ridge, and second trenches patterning the second portion of the body region into a second ridge. The first gate electrode is arranged in at least one of first trenches, and the second gate electrode is arranged in at least one of the second trenches.
1. A semiconductor device comprising a transistor, the transistor comprising:
a source region and a drain region disposed adjacent to a first main surface of a semiconductor substrate;
a first gate electrode and a second gate electrode, the first gate electrode being electrically disconnected from the second gate electrode;
a body region, the first gate electrode being adjacent to a first portion of the body region and the second gate electrode being adjacent to a second portion of the body region, the first portion of the body region and the second portion of the body region forming integral parts of the body region;
first trenches patterning the first portion of the body region into a first ridge; and
second trenches the second portion of the body region into a second ridge,
wherein the first gate electrode is arranged in at least one of the first trenches,
wherein the second gate electrode is arranged in at least one of the second trenches.
2. The semiconductor device of claim 1 , wherein the first trenches and the second trenches have a longitudinal axis parallel to the first main surface and extending along a line connecting the source region and the drain region.
3. The semiconductor device of claim 1 , further comprising a connection portion configured to electrically connect the first portion of the body region with the second portion of the body region.
4. The semiconductor device of claim 3 , wherein the connection portion comprises a doped substrate portion disposed in a connection groove.
5. The semiconductor device of claim 4 , wherein the connection groove extends to a depth of the first or second trenches.
6. The semiconductor device of claim 1 , further comprising a drift zone between the second portion of the body region and the drain region.
7. The semiconductor device of claim 1 , further comprising a source contact extending to a second main surface of the semiconductor substrate.
8. The semiconductor device of claim 1 , further comprising a drain contact extending to a second main surface of the semiconductor substrate.
9. The semiconductor device of claim 6 , further comprising a field plate adjacent to the drift zone.
10. The semiconductor device of claim 9 , wherein the field plate is disposed in field plate trenches that pattern the drift zone into a third ridge.
11. The semiconductor device of claim 10 , wherein the field plate trenches extend to a deeper depth than the first and second trenches.
12. The semiconductor device of claim 9 , wherein the field plate is disposed in at least one of the second trenches.
13. The semiconductor device of claim 9 , wherein the field plate and the second gate electrode are electrically coupled to a second gate terminal.
14. The semiconductor device of claim 5 , wherein the first gate trenches extend along a first gate length and the second gate trenches extend along a second gate length, the second gate length being larger than the first gate length.
15. The semiconductor device of claim 1 , further comprising a vertical body contact portion electrically connected to a source contact and to the body region, the vertical body contact portion vertically overlapping with the source region.
16. The semiconductor device of claim 1 , further comprising a source contact in a source contact groove in the first main surface, wherein the source region and a vertical body contact portion are alternatingly disposed at a sidewall of the source contact groove.
17. The semiconductor device of claim 1 , further comprising a drain contact in a drain contact groove in the first main surface, wherein the drain groove is formed in the body region.
18. A semiconductor device comprising a transistor, the transistor comprising:
a source region and a drain region disposed adjacent to a first main surface of a semiconductor substrate;
a first gate electrode and a second gate electrode, the first gate electrode being electrically disconnected from the second gate electrode;
a body region, the first gate electrode being adjacent to a first portion of the body region and the second gate electrode being adjacent to a second portion of the body region;
first trenches patterning the first portion of the body region into a first ridge; and
second trenches the second portion of the body region into a second ridge,
wherein the first gate electrode is arranged in at least one of the first trenches,
wherein the second gate electrode is arranged in at least one of the second trenches,
the first trench and the second trench being arranged between the source region and the drain region, the transistor further comprising a connection portion adjacent to the first trench and to the second trench, the connection portion being configured to electrically connect the first portion of the body region with the second portion of the body region.
19. The semiconductor device of claim 18 , further comprising a connection groove arranged adjacent to the first trench and to the second trench, the connection portion comprising a doped substrate portion in the connection groove.
20. A semiconductor device comprising a dual-gate transistor, the transistor comprising:
a source region and a drain region disposed adjacent to a first main surface of a semiconductor substrate;
a first gate electrode and a second gate electrode, the first gate electrode being electrically disconnected from the second gate electrode;
a body region, the first gate electrode being adjacent to a first portion of the body region and the second gate electrode being adjacent to a second portion of the body region;
first trenches patterning the first portion of the body region into a first ridge; and
second trenches the second portion of the body region into a second ridge,
wherein the first gate electrode is arranged in at least one of the first trenches,
wherein the second gate electrode is arranged in at least one of the second trenches.