IP Library › Granted Patent US 10,008,579
Granted Patent B2
US 10,008,579 · App. 15/185,860 · Granted Jun 26, 2018

MOSFET with integrated schottky diode

Inventors: Daniel Calafut (San Jose, CA); Yeeheng Lee (San Jose, CA)
Assignee: ALPHA AND OMEGA SEMICONDUCTOR INCORPORATED
H01L29/66143H01L21/265H01L27/0629H01L27/095H01L29/1095H01L29/66257H01L29/7811H01L29/7827H01L29/872
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Quick Facts
Patent No.
US 10,008,579
App. No.
15/185,860
Granted
Jun 26, 2018
Kind
B2
Abstract

Schottky structure fabrication includes forming two trenches in a semiconductor material. The trenches are separated from each other by a mesa. Sidewalls and a bottom surface of the trenches are lined with a dielectric material. A conductive material is disposed in the trenches lining the dielectric material on the sidewalls and the bottom surface. The conductive material on the bottom surface of the trenches is removed so that a first portion of conductive material remains on a first sidewall of each trench, and a second portion of conductive material remains on a second sidewall of each trench. The first and second portions of conductive material are electrically isolated from each other. The space between the first and second portions of the conductive material is filled with a trench filling insulator material and a Schottky contact is formed between the outermost sidewalls of the two trenches.

Claims (21)

1. A method for forming Schottky structure comprising:

a) forming two trenches in a semiconductor material separated by a mesa;

b) lining sidewalls and a bottom surface of the trenches with a dielectric material;

c) disposing a conductive material in the trenches, wherein the disposed conductive material lines the dielectric material on the sidewalls and the bottom surface;

d) removing the conductive material on the bottom surface of the trenches, wherein a first portion of conductive material remains on a first sidewall of each trench, and wherein a second portion of conductive material remains on a second sidewall of each trench, and wherein the first and second portions of conductive material are electrically isolated from each other and are maintained at different electric potentials;

e) filling a space between the first and second portions of the conductive material with a trench filling insulator material; and

f) forming a Schottky contact between the outermost sidewalls of the two trenches.

2. The method of claim 1 , wherein the two trenches are formed in an active region of a MOSFET device.

3. The method of claim 1 , wherein the two trenches are formed in a termination region of a MOSFET device.

4. The method of claim 1 , wherein a width of the mesa between the two trenches is equal to a width of a mesa between device trenches formed in the semiconductor material.

5. The method of claim 1 , wherein a width of the mesa between the two trenches is smaller than an active device mesa separating device trenches.

6. The method of claim 1 , wherein the Schottky contact is formed in the mesa between the two trenches.

7. The method of claim 1 , wherein the Schottky contact is formed in one of the trenches between the first conductive portion and the second conductive portion.

8. The method of claim 1 , wherein Schottky contacts are formed in both trenches between the first conductive portions and the second conductive portions.

9. The method of claim 1 , wherein a first Schottky contact is formed in the mesa between the two trenches and a second Schottky contact is formed in at least one of the trenches between the first conductive portion and the second conductive portion.

10. The method of claim 1 , wherein the Schottky structure is integrated into a bipolar transistor, insulated gate bipolar transistor (IGBT), junction field effect transistor (JFET), a diode, a resistor or a capacitor.

11. The method of claim 2 , wherein the first portion of conductive material in the first trench is maintained at a gate potential, the second portion of conductive material in the first trench is maintained at a source potential, the first portion of conductive material in the second trench is maintained at the source potential, and the second portion of conductive material in the second trench is maintained at the gate potential.

12. The method of claim 3 , wherein the first portion of conductive material in the first trench is maintained at a gate potential, the second portion of conductive material in the first trench is maintained at a source potential, the first portion of conductive material in the second trench is maintained at the source potential, and the second portion of conductive material in the second trench is maintained at drain potential.

13. The method of claim 5 , wherein the width of the mesa between the two trenches is between one fourth and three fourths of the width of the active device mesa.

14. The method of claim 6 , wherein the Schottky contact further contacts the conductive portions in each trench proximate to the mesa.

15. The method of claim 8 , wherein at least one of the Schottky contacts is deactivated by selectively doping the semiconductor material below one of the trenches with dopants configured to prevent a Schottky diode from forming.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2016
From: CALAFUT, DANIEL; LEE, YEEHENG
To: ALPHA AND OMEGA SEMICONDUCTOR INCORPORATED
Reel/Frame 039138/0622 →
Continuity (2)
Division 13926880 · Jun 25, 2013
Related Publication 20160300924A1 · Oct 13, 2016