IP Library › Granted Patent US 10,008,934
Granted Patent B2
US 10,008,934 · App. 15/480,703 · Granted Jun 26, 2018

DC-DC converter with floating capacitors

Inventor: Gerard Villar Piqué (Eindhoven, NL)
Assignee: NXP B.V.
H02M3/158G05F1/10G05F1/56H02M1/08H02M1/14H02M1/38H02M3/07H02M2001/0009
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Quick Facts
Patent No.
US 10,008,934
App. No.
15/480,703
Granted
Jun 26, 2018
Kind
B2
Abstract

A DC-DC power converter is described having a power converter input for receiving a supply voltage; a power converter output for outputting a converted supply voltage; a reference input for supplying a reference value; a switch capacitor power converter coupled to the power converter input and the power converter output and comprising at least one switchable capacitor controllable by at least two non-overlapping clock signals; a controller coupled to the switch capacitor power converter, and the power converter output. The controller is configured to generate at least two non-overlapping clock signals and to vary the non-overlapping time duration dependent on the voltage and/or current value of at least one of the power converter output, the reference input, and the power converter input.

Claims (28)

1. A DC-DC power converter comprising:

a switch capacitor power converter coupled to a power converter input, a power converter output, and comprising a switchable capacitor;

a controller coupled to the switch capacitor power converter, wherein the controller is configured to generate two non-overlapping clock signals having different durations, vary a non-overlapping time duration dependent on the voltage and/or current value of at least one of the power converter output, a reference value, and the power converter input, and operation of the switch capacitor power converter is frozen by a pair of multiplexers during the non-overlapping time duration between the two non-overlapping clock signals, wherein each multiplexer receives a respective clock signal of different duration as an input signal.

2. The DC-DC power converter of claim 1 , wherein the controller is coupled to the power converter input, the power converter output, and a reference input configured to receive the reference value, and the switch capacitor power converter is controllable by the two non-overlapping clock signals.

3. The DC-DC power converter of claim 1 , wherein the controller comprises:

an error detector, wherein the error detector comprises a first input configured to receive the reference value, a second input coupled to the power converter output;

a non-overlapping clock generator coupled to an output of the error detector and configured to vary the clock frequency dependent on the difference between the output voltage and the reference value; and

a control module coupled to an output of the error detector, wherein the control module is configured to generate a modulation control signal for the non-overlapping clock generator.

4. The DC-DC power converter of claim 1 , wherein the controller comprises a timing reference generator.

5. The DC-DC power converter of claim 1 , wherein the controller is configured to increase the non-overlapping time duration in response to at least one of a decrease in output current supplied by the DC-DC power converter, a decrease in the reference value, and an increase in the input voltage of the DC-DC converter.

6. The DC-DC power converter of claim 1 , wherein the controller is configured to decrease the non-overlapping time duration in response to at least one of an increase in the output current supplied by the DC-DC power converter, an increase in the reference value, and a decrease in the input voltage of the DC-DC converter.

7. The DC-DC power converter of claim 1 , further comprising:

an output capacitor coupled to the power converter output.

8. The DC-DC power converter of claim 1 , wherein all floating capacitors of the switch capacitor power converter are disconnected by the pair of multiplexers during the non-overlapping time duration.

9. The DC-DC power converter of claim 3 , wherein each multiplexer of the pair of multiplexers has a first input coupled to a respective output of the non-overlapping clock generator, a second input operably coupled to an off-voltage level, and a control input coupled to the controller, wherein the controller is configured to modulate the non-overlapping time duration by selecting between the first and second inputs in response to a time reference signal.

10. The DC-DC power converter of claim 4 , wherein the timing reference generator is configured to generate a time reference signal equal to half of a nominal switching period.

11. The DC-DC power converter of claim 4 , wherein the timing reference generator is configured to generate a time reference signal dependent on at least one of a charge time and a discharge time of the switchable capacitor.

12. The DC-DC power converter of claim 4 , wherein the timing reference generator is coupled to an oscillator.

13. A method of controlling a DC-DC power converter comprising a switch capacitor power converter having a switchable capacitor, the method comprising:

providing two non-overlapping clocks having different durations to the switch capacitor power converter; and

modulating the non-overlapping time duration of the non-overlapping clocks in dependence on the voltage and/or the current of at least one of the power converter output, the power converter input, and a reference value, wherein operation of the switch capacitor power converter is frozen by a pair of multiplexers during the non-overlapping time duration between the two non-overlapping clocks, wherein each multiplexer receives a respective clock signal of different duration as an input signal.

14. The method of claim 13 , further comprising:

decreasing the non-overlapping time duration in response to at least one of an increase of the output current provided by the DC-DC power converter, an increase in the reference value, and a decrease of the input voltage.

15. The method of claim 13 , further comprising:

increasing the non-overlapping time duration in response to at least one of a decrease in the output current provided by the DC-DC power converter, a decrease in the reference value, and an increase of the input voltage.

16. The method of claim 13 , wherein modulating the non-overlapping time duration further comprises:

generating a time reference signal dependent on at least one of the charge time and discharge time of the switchable capacitor.

17. The method of claim 13 , wherein all floating capacitors of the switch capacitor power converter are disconnected by the pair of multiplexers during the non-overlapping time duration.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2017
From: VILLAR PIQUÉ, GERARD
To: NXP B.V.
Reel/Frame 042176/0089 →
Priority Claims (1)
EP 16165172 · Apr 13, 2016 · regional
Continuity (1)
Related Publication 20170302180A1 · Oct 19, 2017