Systems and methods for binding a removable cryptoprocessor to an information handling system
In accordance with these and other embodiments of the present disclosure, an information handling system may include a processor and a basic input/output system (BIOS) including a program of instructions. The BIOS may be configured to, when read and executed by the processor, calculate a binding secret for binding a cryptoprocessor to a motherboard of the information handling system, the binding secret based on unique identifying information of both the cryptoprocessor and the motherboard, store the binding secret in a non-volatile memory integral to the cryptoprocessor, and validate binding of the cryptoprocessor to the motherboard by comparing a subsequently-calculated binding secret to the binding secret.
1. An information handling system, comprising:
a microprocessor coupled to a motherboard;
a random access memory coupled to the microprocessor;
a basic input/output system (BIOS) comprising a program of BIOS instructions, embodied in non-transitory computer readable media; and
a cryptoprocessor, comprising a cryptographic processor, coupled to the microprocessor and the BIOS;
wherein the BIOS instructions, when read and executed by a processor, cause the processor to perform BIOS operations comprising:
calculating a cryptoprocessor identifier based on a hash of:
a serial number of the cryptoprocessor; and
a random number generated by the cryptoprocessor;
calculating a binding secret value based on:
a unique identifier of the motherboard; and
the cryptoprocessor identifier;
creating a binding secret index to receive and store the binding secret value in a portion of a non-volatile memory integral to the cryptoprocessor;
determining whether the cryptoprocessor is bound to the motherboard;
responsive to determining that the cryptoprocessor is bound to the motherboard, performing validation operations comprising:
reading a previous binding secret value stored in the non-volatile memory using the binding secret index;
comparing the binding secret value and the previous binding secret value; and
responsive to detecting a match between the binding secret value and the previous binding secret value, validating a binding of the cryptoprocessor to the motherboard.
2. The information handling system of claim 1 , wherein the previous binding secret value is permanently locked in the binding secret index.
3. The information handling system of claim 1 , wherein determining whether the cryptoprocessor is bound to the motherboard includes:
determining whether a value read from the binding secret index has any one of one or more predetermined values, wherein the one or more predetermined values include an all 0 value, in which all bits of the value read from the binding secret index are 0, and an all 1 value, in which all bits of the value read from the binding secret index are 1.
4. The information handling system of claim 1 , wherein the BIOS operations include:
responsive to determining that the cryptoprocessor is not bound to the motherboard, performing binding activation operations comprising:
writing the binding secret value to the binding secret index;
write and read protecting the binding secret index by a physical presence provision in the cryptoprocessor; and
determining whether the writing of the binding secret value was successful.
5. The information handling system of claim 4 , wherein the BIOS operations include:
responsive to determining that either the writing of the binding secret value was unsuccessful or the binding secret value did not match the previous binding secret value, performing disabling operations comprising:
disabling the cryptoprocessor;
rebooting the information handling system; and
generating a binding error alert.
6. The information handling system of claim 5 , wherein rebooting the information handling system includes:
rebooting the information handling system without cryptoprocessor support.
7. The information handling system of claim 1 , wherein the cryptoprocessor comprises a Trusted Platform Module compliant with a Trusted Computing Group standard.
8. A method comprising BIOS operations performed by a basic input output system (BIOS) of an information handling system, wherein the BIOS operations include:
calculating a cryptoprocessor identifier based on a hash of:
a serial number of the cryptoprocessor; and
a random number generated by the cryptoprocessor;
calculating a binding secret value based on:
a unique identifier of the motherboard; and
the cryptoprocessor identifier;
creating a binding secret index to receive and store the binding secret value in a portion of a non-volatile memory integral to the cryptoprocessor;
determining whether the cryptoprocessor is bound to the motherboard;
responsive to determining that the cryptoprocessor is bound to the motherboard, performing validation operations comprising:
reading a previous binding secret value stored in the non-volatile memory using the binding secret index;
comparing the binding secret value and the previous binding secret value; and
responsive to detecting a match between the binding secret value and the previous binding secret value, validating a binding of the cryptoprocessor to the motherboard.
9. The method of claim 8 , wherein the previous binding secret value is permanently locked in the binding secret index.
10. The method of claim 8 , wherein determining whether the cryptoprocessor is bound to the motherboard includes:
determining whether a value read from the binding secret index has any one of one or more predetermined values, wherein the one or more predetermined values include an all-0 value in which all bits of the value read from the binding secret index are 0 and an all-1 value in which all bits of the value read from the binding secret index are 1.
11. The method of claim 10 , wherein the BIOS operations include:
responsive to determining that the cryptoprocessor is not bound to the motherboard, performing binding activation operations comprising:
writing the binding secret value to the binding secret index;
write and read protecting the binding secret index by a physical presence provision in the cryptoprocessor; and
determining whether the writing of the binding secret value was successful.
12. The method of claim 11 , wherein the BIOS operations include:
responsive to determining that either the writing of the binding secret value was unsuccessful or the binding secret value did not match the previous binding secret value, performing disabling operations comprising:
disabling the cryptoprocessor;
rebooting the information handling system; and
generating a binding error alert.
13. The method of claim 12 , wherein rebooting the information handling system includes:
rebooting the information handling system without cryptoprocessor support.
14. The method of claim 8 , wherein the cryptoprocessor is a modular component readily removable from the motherboard once coupled to the motherboard.
15. The method of claim 8 , wherein the cryptoprocessor comprises a Trusted Platform Module compliant with a Trusted Computing Group standard.
16. An article of manufacture comprising:
a non-transitory computer-readable medium; and
processor-executable basic input output system (BIOS) instructions carried on the non-transitory computer-readable medium, wherein the BIOS instructions, when read and executed by a processor, cause the microprocessor to perform BIOS operations comprising:
calculating a cryptoprocessor identifier based on a hash of:
a serial number of the cryptoprocessor; and
a random number generated by the cryptoprocessor;
calculating a binding secret value based on:
a unique identifier of the motherboard; and
the cryptoprocessor identifier;
creating a binding secret index to receive and store the binding secret value in a portion of a non-volatile memory integral to the cryptoprocessor;
determining whether the cryptoprocessor is bound to the motherboard;
responsive to determining that the cryptoprocessor is bound to the motherboard, performing validation operations comprising:
reading a previous binding secret value stored in the non-volatile memory using the binding secret index;
comparing the binding secret value and the previous binding secret value; and
responsive to detecting a match between the binding secret value and the previous binding secret value, validating a binding of the cryptoprocessor to the motherboard.
17. The article of claim 16 , wherein the previous binding secret value is permanently locked in the binding secret index.
18. The article of claim 16 , wherein determining whether the cryptoprocessor is bound to the motherboard includes:
determining whether a value read from the binding secret index has any one of one or more predetermined values, wherein the one or more predetermined values include an all-0 value in which all bits of the value read from the binding secret index are 0 and an all-1 value in which all bits of the value read from the binding secret index are 1.
19. The article of claim 18 , wherein the BIOS operations include:
responsive to determining that the cryptoprocessor is not bound to the motherboard, performing binding activation operations comprising:
writing the binding secret value to the binding secret index;
write and read protecting the binding secret index by a physical presence provision in the cryptoprocessor; and
determining whether the writing of the binding secret value was successful.
20. The article of claim 19 , wherein the BIOS operations include:
responsive to determining that either the writing of the binding secret value was unsuccessful or the binding secret value did not match the previous binding secret value, performing disabling operations comprising:
disabling the cryptoprocessor;
rebooting the information handling system; and
generating a binding error alert.
21. The article of claim 20 , wherein rebooting the information handling system includes:
rebooting the information handling system without cryptoprocessor support.
22. The article of claim 16 , wherein the cryptoprocessor is a modular component readily removable from the motherboard once coupled to the motherboard.
23. The article of claim 16 , wherein the cryptoprocessor comprises a Trusted Platform Module compliant with a Trusted Computing Group standard.