IP Library Granted Patent US 10,015,414
Granted Patent B2
US 10,015,414 · App. 14/989,244 · Granted Jul 3, 2018

Image sensor, data processing system including the same

Inventors: Byung Jo Kim (Seoul, KR); Seog Heon Ham (Suwon-si, KR); Sung Ho Suh (Hwaseong-si, KR); Se Jun Kim (Seoul, KR); Young Tae Jang (Pyeongtaek-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H04N5/347H04N5/378H04N5/37457H04N9/045
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Quick Facts
Patent No.
US 10,015,414
App. No.
14/989,244
Granted
Jul 3, 2018
Kind
B2
Abstract

An image sensor includes a pixel array and N analog-to-digital converters (ADCs). The pixel array includes N pixels arranged in each of a plurality of rows, and each of the N pixels include M photoelectric conversion elements. At least one of the N ADCs are shared by at least one of the M photoelectric conversion elements included in each of the N pixels.

Claims (76)

1. An image sensor comprising:

N pixels arranged in each of a plurality of rows, each of the N pixels in each of the plurality of rows including M photoelectric conversion elements, the M photoelectric conversion elements that are included in each of the N pixels below a microlens;

N analog-to-digital converters (ADCs); and

a binning circuit configured to bin pixel signals output from each of the N pixels,

wherein at least one of the N ADCs is shared by at least one of the M photoelectric conversion elements included in each of the N pixels,

the N pixels arranged in a first row of the plurality of rows include a first pixel below a first microlens, the first pixel including a first photoelectric conversion element and a second photoelectric conversion element,

the N pixels arranged in a second row of the plurality of rows include a second pixel below a second microlens, the second row adjacent to the first row, the second row including a third photoelectric conversion element and a fourth photoelectric conversion element,

a first transfer transistor of the first photoelectric conversion element and a third transfer transistor of the third photoelectric conversion element are connected to a first transmission line, and

a second transfer transistor of the second photoelectric conversion element and a fourth transfer transistor of the fourth photoelectric conversion element are connected to a second transmission line.

2. The image sensor of claim 1 , wherein each of the N pixels are associated with M floating diffusion nodes, and charges output from the M photoelectric conversion elements included in each of the N pixels are transferred to the M floating diffusion nodes, respectively.

3. The image sensor of claim 1 , wherein

the first photoelectric conversion element and the third photoelectric conversion element share a first floating diffusion node at the M floating diffusion nodes, and

the second photoelectric conversion element and the fourth photoelectric conversion element share a second floating diffusion node at the M floating diffusion nodes.

4. The image sensor of claim 1 ,

wherein when the first pixel and the second pixel are arranged in one row of the plurality of rows, the binning circuit is configured to,

generate a first pixel signal using first charges output from the first photoelectric conversion element and second charges output from the second photoelectric conversion element,

generate a second pixel signal using third charges output from the third photoelectric conversion element and fourth charges output from the fourth photoelectric conversion element,

bin the first pixel signal and the second pixel signal, and

transmit the binned first and second pixel signals to a first ADC selected from among the N ADCs.

5. The image sensor of claim 1 ,

wherein when the first pixel and the second pixel are arranged in one row of the plurality of rows, the binning circuit is configured to,

bin first charges output from the first photoelectric conversion element and third charges output from the third photoelectric conversion element to generate a first binned pixel signal,

bin second charges output from the second photoelectric conversion element and fourth charges output from the fourth photoelectric conversion element to generate a second binned pixel signal, and

transmit the first binned pixel signal to a first ADC selected from among the N ADCs and the second binned pixel signal to a second ADC selected from among the N ADCs.

6. The image sensor of claim 1 ,

wherein when the first pixel and the second pixel are arranged in one row of the plurality of rows, the binning circuit is configured to,

generate a first pixel signal using first charges output from the first photoelectric conversion element and second charges output from the second photoelectric conversion element,

generate a second pixel signal using third charges output from the third photoelectric conversion element and fourth charges output from the fourth photoelectric conversion element, and

transmit the first pixel signal to a first ADC selected from among the N ADCs and the second pixel signal to a second ADC selected from among the N ADCs.

7. The image sensor of claim 1 , wherein the M photoelectric conversion elements included in each of the N pixels correspond to one microlens, where M is a natural number of 2 or more.

8. The image sensor of claim 1 , wherein

the binning circuit includes a first switch circuit, a second switch circuit connected to the first switch circuit, and a binning node configured to bin charges transmitted from the second switch circuit, and

the binning circuit is further configured to control a first arrangement of the first switch circuit and a second arrangement of the second switch circuit respectively.

9. The image sensor of claim 8 , wherein

first charges output from the first photoelectric conversion element are transmitted to the second switch circuit through a first path of the first switch circuit,

second charges output from the second photoelectric conversion element are transmitted to the second switch circuit through a second path of the first switch circuit, and

the second switch circuit is configured to receive the first charges and the second charges, and transmit the first charges and the second charges to the binning node.

10. A data processing system comprising:

an image sensor; and

a controller configured to control an operation of the image sensor, the image sensor including,

N pixels arranged in each of a plurality of rows, each of the N pixels in each of the plurality of rows including M photoelectric conversion elements,

N analog-to-digital converters (ADCs), and

a binning circuit configured to bin pixel signals output from each of the N pixels in each of the plurality of rows and transmit the binned pixel signals to at least one of the N ADCs,

wherein the at least one of the N ADCs is activated to convert the binned pixel signals to digital signals while the other of the N ADCs is deactivated.

11. The data processing system of claim 10 , wherein

the N pixels arranged in a first row of the plurality of rows include a first pixel, the first pixel including a first photoelectric conversion element and a second photoelectric conversion element,

the N pixels arranged in a second row of the plurality of rows include a second pixel, the second row adjacent to the first row, the second row including a third photoelectric conversion element and a fourth photoelectric conversion element,

a first transfer transistor of the first photoelectric conversion element and a third transfer transistor of the third photoelectric conversion element are connected to a first transmission line, and

a second transfer transistor of the second photoelectric conversion element and a fourth transfer transistor of the fourth photoelectric conversion element are connected to a second transmission line.

12. The data processing system of claim 11 , wherein

each of the N pixels are associated with M floating diffusion nodes, and charges output from the M photoelectric conversion elements included in each of the N pixels are transferred to the M floating diffusion nodes, respectively,

the first photoelectric conversion element and the third photoelectric conversion element share a first floating diffusion node of the M floating diffusion nodes, and

the second photoelectric conversion element and the fourth photoelectric conversion element share a second floating diffusion node of the M floating diffusion nodes.

13. The data processing system of claim 11 , wherein the binning circuit includes a first switch circuit and a second switch circuit connected to the first switch circuit, and is further configured to control a first arrangement of the first switch circuit and a second arrangement of the second switch circuit respectively.

14. The data processing system of claim 13 , wherein

first charges output from the first photoelectric conversion element are transmitted to the second switch circuit through a first path of the first switch circuit,

second charges output from the second photoelectric conversion element are transmitted to the second switch circuit through a second path of the first switch circuit, and

the second switch circuit is configured to receive the first charges and the second charges, and transmit the first charges and the second charges to the binning node.

15. The data processing system of claim 10 , wherein the M photoelectric conversion elements included in each of the N pixels correspond to one microlens, where M is a natural number of 2 or more.

16. An image sensor comprising:

a first pixel arranged in a first row of a pixel array, the pixel array including N pixels arranged in each of a plurality of rows, each of the N pixels in each of the plurality of rows including M photoelectric conversion elements, the first pixel including a first photoelectric conversion element and a second photoelectric conversion element;

a second pixel arranged in the first row of the pixel array, the second pixel including a third photoelectric conversion element and a fourth photoelectric conversion element;

a binning circuit configured to bin pixel signals output from the first pixel and the second pixel;

a first analog-to-digital converter (ADC) configured to be shared by the first photoelectric conversion element and the second photoelectric conversion element; and

a second analog-to-digital converter (ADC) configured to be shared by the third photoelectric conversion element and the fourth photoelectric conversion element,

wherein a first transfer transistor of the first photoelectric conversion element and a third transfer transistor of the third photoelectric conversion element are connected to a first transmission line, and

wherein a second transfer transistor of the second photoelectric conversion element and a fourth transfer transistor of the fourth photoelectric conversion element are connected to a second transmission line.

17. The image sensor of claim 16 , wherein the binning circuit configured to,

generate a first pixel signal using charges output from the first photoelectric conversion element and the second photoelectric conversion element,

generate a second pixel signal using charges output from the third photoelectric Conversion element and the fourth photoelectric conversion element, and

transmit the binned pixel signals to the first analog-to-digital converter (ADC) based on the first pixel signal and the second pixel signal.

18. The image sensor of claim 16 , wherein the binning circuit includes a first switch circuit and a second switch circuit connected to the first switch circuit, and is further configured to control a first arrangement of the first switch circuit and a second arrangement of the second switch circuit respectively.

19. The image sensor of claim 18 , wherein

first charges output from the first photoelectric conversion element are transmitted to the second switch circuit through a first path of the first switch circuit,

second charges output from the second photoelectric conversion element are transmitted to the second switch circuit through a second path of the first switch circuit, and

the second switch circuit is configured to receive the first charges and the second charges, and transmit the first charges and the second charges to the binning node.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 6, 2016
From: KIM, BYUNG JO; HAM, SEOG HEON; SUH, SUNG HO; KIM, SE JUN; JANG, YOUNG TAE
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 037422/0569 →
Priority Claims (1)
KR 10-2015-0033393 · Mar 10, 2015 · national
Continuity (1)
Related Publication 20160269669A1 · Sep 15, 2016