Pixel compensation circuits, scanning driving circuits and flat display devices
View Patent ↗The present disclosure relates to pixel compensation circuit, pixel compensation method and flat display device. Control ends of first to third, fourth, and fifth controllable transistors connect to first to third, third, and fourth scanning lines, first end of first controllable transistor connects to data line, control end of driving transistor connects to second ends of first controllable transistor, and second controllable transistors through storage capacitor, and first end of third controllable transistor; first end of second controllable transistor connects to first voltage end, second end of driving transistor connects to second end of second controllable transistor and anode of OLED; cathode of OLED is grounded; first end of driving transistor connects to second ends of third and fifth controllable transistors and first end of fourth controllable transistor, second end of fourth controllable transistor connects to reference voltage end; first end of fifth controllable transistor connects to second voltage end.
1. A pixel compensation method, comprising:
during a reset phase, a driving transistor, and a second controllable transistor, a third controllable transistor, a fourth controllable transistor are turned on, and a first controllable transistor and a fifth controllable transistor are turned off, a voltage at the control end of the driving transistor equals to a reference voltage outputted by a reference voltage end, and the voltage at the second end of the driving transistor equals to a first voltage outputted by a first voltage end;
during a threshold voltage fetching phase, the driving transistor, the third controllable transistor, and the fourth controllable transistor are turned on, and the first controllable transistor, the second controllable transistor, and the fifth controllable transistor are turned off, the voltage at the control end of the driving transistor equals to the reference voltage, and the voltage at the second end of the driving transistor equals to a difference between the reference voltage and a threshold voltage of the driving transistor;
during a data writing phase, the driving transistor and the first controllable transistor are turned on, and the second controllable transistor, the third controllable transistor, the fourth controllable transistor, and the fifth controllable transistor are turned off, and a storage capacitor is charged, the voltage at the control end of the driving transistor equals to a data voltage outputted by a data line, and the voltage at the second end of the driving transistor satisfies the equation below:
Vs=V ref− Vth+ΔV;
wherein Vref represents the reference voltage, Vth represents the threshold voltage of the driving transistor, ΔV represents the voltage increments of the second end of the driving transistor; and
during a driving light-emitting phase, the driving transistor and the fifth controllable transistor are turned on, the first controllable transistor, the second controllable transistor, the third controllable transistor, and the fourth controllable transistor are turned off, and voltage between the control end and the second end of the driving transistor satisfies the equation below:
Vgs=V data− V ref+ Vth−ΔV;
a current passing through the OLED satisfies the equation below:
I=K *( Vgs−Vth ) 2 =K *( V data− V ref−Δ V ) 2 ;
wherein Vdata represents the data voltage outputted by the data line, and K is a coefficient.
2. The pixel compensation method as claimed in claim 1 , wherein the driving transistor, the first controllable transistor, the second controllable transistor, the third controllable transistor, the fourth controllable transistor, and the fifth controllable transistor are NMOS TFTs, PMOS TFTs, or a combination of the NMOS TFTs and the PMOS TFTs, the control end, the first end, and the second end of the first controllable transistor, the second controllable transistor, the third controllable transistor, the fourth controllable transistor, and the fifth controllable transistor respectively correspond to a gate, a drain, and a source of the TFT.