Charging circuit for charging a capacitor
A charging circuit that charges a capacitor using the power that is output from a power supply, includes: first and second PNP-type transistors; first and second resistors; and a current path maintaining unit, wherein the power supply is connected to the emitter terminal of the first PNP-type transistor, the first resistor is connected between the emitter terminal and the base terminal of the first PNP-type transistor, the capacitor is connected to the collector terminal of the second PNP-type transistor, the second resistor is connected between the collector and base terminals of the second PNP-type transistor, the base terminal and the collector terminal of the first PNP-type transistor are respectively connected to the emitter terminal and the base terminal of the second PNP-type transistor, and the current path maintaining unit is provided between the collector terminal of the first PNP-type transistor and the emitter terminal of the second PNP-type transistor.
1. A charging circuit that charges a capacitor using the power that is output from a power supply, comprising:
a first PNP-type transistor;
a second PNP-type transistor;
a first resistor;
a second resistor; and
a current path maintaining unit,
wherein the power supply is connected to the emitter terminal of the first PNP-type transistor,
the first resistor is connected between the emitter terminal of the first PNP-type transistor and the base terminal of the first PNP-type transistor,
the capacitor is connected to the collector terminal of the second PNP-type transistor,
the second resistor is connected between the collector terminal of the second PNP-type transistor and the base terminal of the second PNP-type transistor,
the base terminal of the first PNP-type transistor is connected to the emitter terminal of the second PNP-type transistor,
the collector terminal of the first PNP-type transistor is connected to the base terminal of the second PNP-type transistor,
the second PNP-type transistor outputs a current of a predetermined set current value or less,
the current path maintaining unit is provided between the collector terminal of the first PNP-type transistor and the emitter terminal of the second PNP-type transistor, and
a current path from the power supply to the capacitor is formed using the first resistor, the second resistor, and the current path maintaining unit.
2. A charging circuit that charges a capacitor using the power that is output from a power supply, comprising:
a first NPN-type transistor;
a second NPN-type transistor;
a first resistor;
a second resistor; and
a current path maintaining unit,
wherein the capacitor is connected to the emitter terminal of the first NPN-type transistor,
the first resistor is connected between the emitter terminal of the first NPN-type transistor and the base terminal of the first NPN-type transistor,
the power supply is connected to the collector terminal of the second NPN-type transistor,
the second resistor is connected between the collector terminal of the second NPN-type transistor and the base terminal of the second NPN-type transistor,
the base terminal of the first NPN-type transistor is connected to the emitter terminal of the second NPN-type transistor,
the collector terminal of the first NPN-type transistor is connected to the base terminal of the second NPN-type transistor,
the second NPN-type transistor outputs a current of a predetermined set current value or less,
the current path maintaining unit is provided between the collector terminal of the first NPN-type transistor and the emitter terminal of the second NPN-type transistor, and
a current path from the power supply to the capacitor is formed using the first resistor, the second resistor, and the current path maintaining unit.
3. The charging circuit according to claim 1 ,
wherein the predetermined set current value is set by the first resistor and the first PNP-type transistor,
the current path maintaining unit is configured with a third resistor, and
a resistance value of the third resistor is set based on the predetermined set current value.
4. The charging circuit according to claim 2 ,
wherein the predetermined set current value is set by the first resistor and the first NPN-type transistor,
the current path maintaining unit is configured with a third resistor, and
a resistance value of the third resistor is set based on the predetermined set current value.
5. The charging circuit according to claim 3 , further comprising:
an estimation unit that estimates a current capacitance value of the capacitor,
wherein the resistance value of the third resistor is set based on the capacitance value estimated by the estimation unit.
6. The charging circuit according to claim 4 , further comprising:
an estimation unit that estimates a current capacitance value of the capacitor,
wherein the resistance value of the third resistor is set based on the capacitance value estimated by the estimation unit.
7. The charging circuit according to claim 3 ,
wherein the resistance value of the third resistor is changed based on the difference between an output voltage of the power supply and an inter-terminal voltage of the capacitor and an allowable power dissipation of the first resistor and the second resistor.
8. The charging circuit according to claim 4 ,
wherein the resistance value of the third resistor is changed based on the difference between an output voltage of the power supply and an inter-terminal voltage of the capacitor and an allowable power dissipation of the first resistor and the second resistor.
9. The charging circuit according to claim 5 ,
wherein the resistance value of the third resistor is changed based on the difference between an output voltage of the power supply and an inter-terminal voltage of the capacitor and an allowable power dissipation of the first resistor and the second resistor.
10. The charging circuit according to claim 6 ,
wherein the resistance value of the third resistor is changed based on the difference between an output voltage of the power supply and an inter-terminal voltage of the capacitor and an allowable power dissipation of the first resistor and the second resistor.