Method of manufacturing a processor
An inductor is integrated into a multilevel wiring network of a semiconductor integrated circuit. The inductor includes a planar magnetic core and a conductive winding. The conductive winding turns around in generally spiral manner on the outside of the planar magnetic core. The conductive winding is piecewise constructed of wire segments and of VIAs. The wire segments pertain to at least two wiring planes and the VIAs are interconnecting the at least two wiring planes. Methods for such integration, and for fabricating laminated planar magnetic cores are also presented.
1. A method of manufacturing a processor, comprising:
depositing a first partial layer of an insulation layer on a first wiring plane, said first wiring plane having a first wire electrically connected through a first conductive VIA to a second wire in a second wiring plane;
forming a magnetic core on said first partial layer, wherein said forming of said magnetic core includes:
depositing a magnetic layer on said first partial layer;
depositing a core insulation layer on said magnetic layer; and
depositing a core metal layer on said core insulation layer, wherein said core metal layer is non-magnetic;
depositing a second partial layer of said insulation layer on said first partial layer and said magnetic core;
defining a hole in said first and second partial layers of said insulation layer to expose said first wire in said first wiring plane;
depositing a first metal in said hole to form a second conductive VIA to said first wire;
depositing a second metal on an exposed surface of said second partial layer of said insulation layer, said exposed surface parallel to said first or second wiring plane; and
patterning said second metal to form a third metal wire,
wherein said first wire, said second conductive VIA, and said third metal wire comprise a conductive winding around said magnetic core.
2. The method of claim 1 , further comprising applying a magnetic field during said forming of said magnetic core.
3. The method of claim 1 , wherein said magnetic layer is 10 nm to 1000 nm in height, said height in a direction orthogonal to said first wiring plane.
4. The method of claim 3 , wherein said magnetic layer is 50 nm to 500 nm in height.
5. The method of claim 1 , wherein said core insulation layer and said core metal layer have a collective height of 5 nm to 100 nm.
6. The method of claim 1 , further comprising:
forming at least three parallel magnetic cores on said first partial layer, each said parallel magnetic core having a first end and a second end;
forming a first planar coupler, said first planar coupler connected to said first end of each of said parallel magnetic cores; and
forming a second planar coupler, said second planar coupler connected to said second end of each of said parallel magnetic cores.
7. The method of claim 6 , further comprising forming a parallel conductive winding around each of said parallel magnetic cores.
8. The method of claim 1 , wherein said core metal layer comprises tantalum.