IP Library Granted Patent US 10,032,739
Granted Patent B2
US 10,032,739 · App. 15/591,456 · Granted Jul 24, 2018

Semiconductor device

Inventors: Tadahiro Morifuji (Kyoto, JP); Shigeyuki Ueda (Kyoto, JP)
Assignee: Rohm Co., Ltd.
H01L24/13H01L24/05H01L2224/0569H01L2224/05561H01L2224/13006H01L2224/13023H01L2224/1356
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Quick Facts
Patent No.
US 10,032,739
App. No.
15/591,456
Granted
Jul 24, 2018
Kind
B2
Abstract

Disclosed is a semiconductor device suppressed in decrease of reliability. The semiconductor device comprises an electrode pad portion ( 2 ) formed on the upper surface of a semiconductor substrate ( 1 ), a passivation layer ( 3 ) so formed on the upper surface of the semiconductor substrate ( 1 ) as to overlap a part of the electrode pad portion ( 2 ) and having a first opening portion ( 3 a ) where the upper surface of the electrode pad portion ( 2 ) is exposed, a barrier metal layer ( 5 ) formed on the electrode pad portion ( 2 ), and a solder bump ( 6 ) formed on the barrier metal layer ( 5 ). The barrier metal layer ( 5 ) is formed such that an outer peripheral end ( 5 b ) lies within the first opening portion ( 3 a ) of the passivation layer ( 3 ) when viewed in plan.

Claims (33)

1. A semiconductor device comprising:

an electrode pad portion on a face of a substrate;

a first protection layer including a first opening through which a top face of the electrode pad portion is exposed, the first protection layer disposed on the face of the substrate and overlapping part of the electrode pad portion;

a barrier metal layer on the electrode pad portion;

a second protection layer covering a region on the first protection layer and a region on the electrode pad portion; and

a bump electrode on the barrier metal layer,

wherein the barrier metal layer has a circumferential end part thereof formed inward of the first opening in the first protection layer as seen in a plan view,

wherein the electrode pad portion is rectangular as seen in a plan view;

wherein

a peripheral part of the barrier metal layer lies on the second protection layer, and

an upper surface and a lower surface of the barrier metal layer have a curved shape extending along the second protection layer so that a center point of a curvature of the curved shape as seen in a sectional view is located on a substrate side of the curved shape, and

wherein

the second protection layer is formed of polyimide,

the second protection layer has a second opening through which the top face of the electrode pad portion is exposed and which has an opening width smaller than the first opening, and

a thickness of the second protection layer as seen in a sectional view increases gradually from a rim part of the second opening to the peripheral part of the barrier metal layer.

2. The semiconductor device according to claim 1 , wherein the electrode pad portion is formed of a material comprising aluminum, the barrier metal layer is formed of a material comprising titanium, and the bump electrode comprises a solder bump.

3. A semiconductor device comprising:

an electrode pad portion on a face of a substrate;

a first protection layer including a first opening through which a top face of the electrode pad portion is exposed, the first protection layer disposed on the face of the substrate to overlap part of the electrode pad portion;

a barrier metal layer on the electrode pad portion so as not to be in direct contact with the first protection layer;

a second protection layer covering a region on the first protection layer and a region on the electrode pad portion; and

a bump electrode on the barrier metal layer,

wherein the first protection layer has a step part as a result of the first protection layer overlapping the part of the electrode pad portion; and

wherein the barrier metal layer has a circumferential end part thereof formed outward of the step part as seen in a plan view,

wherein the electrode pad portion is rectangular as seen in a plan view;

wherein

a peripheral part of the barrier metal layer lies on the second protection layer, and

an upper surface and a lower surface of the barrier metal layer have a curved shape extending along the second protection layer so that a center point of a curvature of the curved shape as seen in a sectional view is located on a substrate side of the curved shape, and

wherein

the second protection layer is formed of polyimide,

the second protection layer has a second opening through which the top face of the electrode pad portion is exposed and which has an opening width smaller than the first opening, and

a thickness of the second protection layer as seen in a sectional view increases gradually from a rim part of the second opening to the peripheral part of the barrier metal layer.

4. The semiconductor device according to claim 3 , wherein the electrode pad portion is formed of a material comprising aluminum, the barrier metal layer is formed of a material comprising titanium, and the bump electrode comprises a solder bump.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2017
From: MORIFUJI, TADAHIRO; UEDA, SHIGEYUKI
To: ROHM CO., LTD.
Reel/Frame 042335/0442 →
Priority Claims (2)
JP 2007-159351 · Jun 15, 2007 · national
JP 2007-159354 · Jun 15, 2007 · national
Continuity (7)
Continuation 15219912 · Jul 26, 2016
Continuation 14803207 · Jul 20, 2015
Continuation 14491556 · Sep 19, 2014
Continuation 14337959 · Jul 22, 2014
Continuation 13856905 · Apr 4, 2013
Division 12663563
Related Publication 20170243844A1 · Aug 24, 2017