FinFET with ESD protection
In some embodiments, a field effect transistor structure includes a substrate, a fin structure and a gate structure. The fin structure is formed over the substrate. The fin structure includes a first channel region, a first source or drain region and a second source or drain region. The first source or drain region and the second source or drain region are formed on opposite ends of the first channel region, respectively. The well region is formed of the same conductivity type as the second source or drain region, connected to the second source or drain region, and extended to the substrate. The first gate structure wraps around the first channel region in the fin structure.
1. A method, comprising:
providing a substrate;
forming a well region in the substrate,
wherein the well region extends to a first depth of the substrate;
removing portions of the substrate to form a fin structure comprising a portion of the well region, and having a height not exceeding the first depth of the substrate,
forming a first gate structure that wraps around a first channel region of the fin structure; and
replacing portions of the fin structure on opposite ends of the first channel region with a first source or drain region and a second source or drain region of the same conductivity type as the well region, so that the well region being free from extending to a top end of the fin structure unwrapped by the first gate structure,
wherein
the second source or drain region is connected to the well region.
2. The method of claim 1 , further comprising:
removing other portions of the substrate to form another fin structure comprising another portion of the well region, and having the height,
wherein the first depth is larger than the height of the fin structure and the other fin structure.
3. The method of claim 1 , wherein the second source or drain region has a longer length than the first source or drain region.
4. The method of claim 3 , further comprising:
forming a third source or drain region and a fourth source or drain region of the same conductivity type as the well region in the fin structure,
wherein the third source or drain region and the fourth source or drain region are formed on opposite ends of a second channel region in the fin structure, respectively;
the fourth source or drain region is connected to the well region; and
the second source or drain region and the fourth source or drain region are adjacent or overlapped; and
forming a second gate structure that wraps around the second channel region in the fin structure.
5. The method of claim 4 , wherein the formed second source or drain region and the fourth source or drain region comprise a stressor material that has a lattice constant different from that of the first channel region and the second channel region, respectively.
6. The method of claim 5 , further comprising:
forming at least one dummy gate structure whereby during formation of the second source or drain region and the fourth source or drain region, the adjacent or overlapped second source or drain region and fourth source or drain region are divided into a plurality of sections.
7. The method of claim 3 , further comprising:
forming at least one contact over the well region.
8. A method, comprising:
providing a substrate;
forming a well region in the substrate,
wherein the well region extends to a first depth of the substrate;
removing portions of the substrate to form a fin structure comprising a portion of the well region, and having a height not exceeding the first depth of the substrate;
forming dielectric isolation regions on the substrate and at opposite sides the fin structure;
forming a sacrificial gate structure and a sacrificial dummy gate structure over the fin structure and the substrate; and
replacing a first portion and a second portion of the fin structure by a first source or drain region and a second source or drain region of the same conductivity type as the well region in the fin structure,
wherein the first source or drain region and the second source or drain region are formed on and abutting opposite ends of a first channel region in the fin structure, respectively; and the second source or drain region is connected to the well region.
9. The method of claim 8 , wherein the replacement of the first portion and the second portion of the fin structure by the first source or drain region and the second source or drain region of the same conductivity type as the well region in the fin structure comprises:
forming recesses in the fin structures on opposite sides of the sacrificial gate structure.
10. The method of claim 9 , wherein the replacement of the first portion and the second portion of the fin structure by the first source or drain region and the second source or drain region of the same conductivity type as the well region in the fin structure further comprises:
forming embedded stressor regions in the recesses in the fin structures.
11. The method of claim 10 , wherein the replacement of the first portion and the second portion of the fin structure by the first source or drain region and the second source or drain region of the same conductivity type as the well region in the fin structure further comprises:
doping the embedded stressor regions with dopants of the same conductivity type as the well region in the fin structure.
12. The method of claim 11 , wherein the doping of the embedded stressor regions with dopants of the same conductivity type as the well region in the fin structure comprises:
doping the embedded stressor regions with dopants of the same conductivity type as the well region in the fin structure, so that the embedded stressor regions are more heavily doped than the well region.
13. The method of claim 8 , further comprising:
forming a replacement gate structure and a replacement dummy gate structure over the fin structure and the substrate.
14. The method of claim 8 , further comprising:
forming a contact over the fin structure and the substrate.
15. The method of claim 8 , wherein the second source or drain region has a longer length than the first source or drain region.
16. A method, comprising:
providing a substrate;
forming a well region in the substrate;
etching trenches in the substrate to define a fin structure comprising a portion of the well region;
filling dielectric material in the trenches;
forming a sacrificial gate structure and a sacrificial dummy gate structure over the substrate and wrapping around the fin structure; and
forming a first source or drain region and a second source or drain region of the same conductivity type as the well region in the fin structure,
wherein the first source or drain region and the second source or drain region are formed in the fin structure, and the first source or drain region and the second source or drain region abut opposite ends of a channel region which locates under the sacrificial gate structure in the fin structure, and the second source or drain region is connected to the well region.
17. The method of claim 16 , further comprising:
forming a third source or drain region of the same conductivity type as the well region in the fin structure, and the second source or drain region and the third source or drain region abut opposite ends of a region which locates under the sacrificial dummy gate structure in the fin structure, and the third source or drain region is connected to the well region.
18. The method of claim 16 , further comprising:
removing the sacrificial gate structure and the sacrificial dummy gate structure.
19. The method of claim 18 , further comprising:
forming a replacement gate structure and a replacement dummy gate structure over the fin structure and the substrate.
20. The method of claim 16 , further comprising:
forming a contact over the fin structure and the substrate.