Semiconductor device structure and method

1. A method of manufacturing a semiconductor device, the method comprising:

forming a first semiconductor layer over a substrate;

epitaxially growing a single-crystal first insulator layer over the first semiconductor layer;

epitaxially growing a second semiconductor layer over the single-crystal first insulator layer;

epitaxially growing a single-crystal second insulator layer over the second semiconductor layer;

epitaxially growing a third semiconductor layer over the single-crystal second insulator layer;

patterning the first semiconductor layer, the single-crystal first insulator layer, the second semiconductor layer, the single-crystal second insulator layer, and the third semiconductor layer into a stair-step pattern; and

forming contacts to the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer.

2. The method of claim 1 , wherein the epitaxially growing the single-crystal first insulator layer comprises growing the single-crystal first insulator layer from the first semiconductor layer.

3. The method of claim 1 , wherein the epitaxially growing the second semiconductor layer comprises at least in part a molecular beam epitaxy process.

4. The method of claim 3 , wherein the epitaxially growing the second semiconductor layer comprises introducing dopants into the second semiconductor layer during the molecular beam epitaxy process.

5. The method of claim 1 , further comprising implanting dopants into the second semiconductor layer after the epitaxially growing the second semiconductor layer.

6. The method of claim 1 , further comprising depositing a gate dielectric and gate electrode over the third semiconductor layer.

7. A method of manufacturing a semiconductor device, the method comprising:

growing a transistor stack, the growing the transistor stack comprising:

growing a first insulator layer from a first semiconductor layer;

growing a second semiconductor layer from the first insulator layer; and

growing a second insulator layer from the second semiconductor layer; and

patterning the transistor stack, the patterning the transistor stack comprising:

using a first mask to pattern the second insulator layer;

using a second mask different from the first mask to pattern the second semiconductor layer; and

using a third mask different from the second mask to pattern the first insulator layer.

8. The method of claim 7 , further comprising growing a third semiconductor layer from the second insulator layer.

9. The method of claim 8 , further comprising patterning the third semiconductor layer with a fourth mask different from the first mask.

10. The method of claim 9 , further comprising forming a gate dielectric and gate electrode over the third semiconductor layer.

11. The method of claim 10 , implanting dopants into the third semiconductor layer after the forming the gate dielectric and the gate electrode.

12. The method of claim 7 , further comprising:

depositing an interlayer dielectric over the second semiconductor layer; and

forming contacts through the interlayer dielectric to the first semiconductor layer.

13. The method of claim 12 , wherein the forming the contacts forms shallow ohmic contacts.

14. The method of claim 7 , wherein the growing the first insulator layer is performed at least in part through a molecular beam epitaxy process.

15. A method of manufacturing a semiconductor device, the method comprising;

forming a first transistor and a second transistor over a first region of a substrate, the forming the first transistor and the second transistor comprising:

growing a first insulator layer over a first semiconductor layer;

growing a second semiconductor layer over first insulator layer;

growing a second insulator layer over the second semiconductor layer; and

patterning the first semiconductor layer, the first insulator layer, the second semiconductor layer, and the second insulator layer into the first transistor overlying the second transistor; and

forming a third transistor in a second region of the substrate separate from the first region, wherein at least part of the forming the third transistor is performed after the forming the first transistor and the second transistor.

16. The method of claim 15 , wherein the forming the third transistor comprises forming a metal-oxide semiconductor high electron mobility transistor.

17. The method of claim 15 , wherein the forming the third transistor comprises forming a normally-off device.

18. The method of claim 15 , wherein the forming the third transistor comprises epitaxially growing a third semiconductor layer on the first semiconductor layer.

19. The method of claim 18 , further comprising forming a gate dielectric in physical contact with the third semiconductor layer.

20. The method of claim 18 , further comprising forming a gate electrode in physical contact with the third semiconductor layer.