IP Library › Granted Patent US 10,036,926
Granted Patent B2
US 10,036,926 · App. 15/194,389 · Granted Jul 31, 2018

Array substrate and display device including the same

Inventors: Dong Hee Shin (Asan-si, KR); Jae Jin Song (Hwaseong-si, KR); Dong Hyeon Ki (Asan-si, KR)
Assignee: Samsung Display Co., Ltd.
G02F1/13394G02F1/133345H01L27/1248H01L29/4908H01L29/4916G02F2001/13396G02F2001/13398G02F2001/133388G02F2001/136222
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,036,926
App. No.
15/194,389
Granted
Jul 31, 2018
Kind
B2
Abstract

Disclosed herein are an array substrate and a display device including the same. The array substrate includes a base substrate comprising a display area and a peripheral area; a thin-film transistor disposed in the display area of the base substrate; an insulation layer disposed in the display area of the base substrate, the insulation layer comprising a first portion covering the thin-film transistor and a second portion located on the first portion; and a first protruding pattern disposed in the peripheral area of the base substrate, wherein the first portion, the second portion and the first protruding pattern comprise the same material.

Claims (51)

1. An array substrate comprising:

a base substrate comprising a display area and a peripheral area;

a thin-film transistor disposed in the display area of the base substrate;

an insulation layer disposed in the display area of the base substrate, the insulation layer comprising a first portion, covering the thin-film transistor and a second portion located on the first portion; and

a first protruding pattern disposed in the peripheral area of the base substrate,

wherein the first portion, the second portion, and the first protruding pattern comprise the same material, and

wherein a thickness of the first protruding pattern is substantially equal to a thickness of the first portion.

2. The array substrate of claim 1 , wherein the first portion, the second portion, and the first protruding pattern comprise a photosensitive material.

3. The array substrate of claim 1 , wherein the first portion, the second portion, and the first protruding pattern comprise the same color pigment.

4. The array substrate of claim 1 , wherein the first protruding pattern has an island shape in a plan view.

5. The array substrate of claim 1 , wherein a shape of the second portion is substantially similar to a shape of the first protruding pattern in a plan view.

6. The array substrate of claim 1 , wherein the second portion overlaps the thin-film transistor.

7. The array substrate of claim 1 , further comprising:

an insulation pattern disposed on the second portion; and

a second protruding pattern disposed on the first protruding pattern.

8. The array substrate of claim 7 , wherein a material of the insulation pattern is the same as that of the second protruding pattern and is different from that of the insulation layer.

9. The array substrate of claim 7 , wherein the insulation layer comprises a first color pigment, and wherein the second protruding pattern comprises a second color pigment that is different from the first color pigment.

10. The array substrate of claim 1 , further comprising; a circuit part disposed in the peripheral area of the base substrate,

wherein the circuit part comprises a plurality of contacts for electrically connecting wirings formed in the circuit part to one another, and

wherein the first protruding pattern does not overlap the plurality of contacts.

11. The array substrate of claim 10 , wherein the circuit part comprises a gate driving circuit for transmitting a gate signal to the display area, and

wherein the gate driving circuit is an amorphous silicon gate (ASG) circuit.

12. An array substrate comprising:

a base substrate comprising a display area and a peripheral area;

a thin-film transistor disposed in the display area of the base substrate;

an insulation layer disposed in the display area of the base substrate, the insulation layer comprising a first portion covering the thin-film transistor and a second portion located on the first portion; and

a first protruding pattern, disposed in the peripheral area of the base substrate,

wherein the first portion, the second portion, and the first protruding pattern comprise the same material, and

wherein a hardness of an overlapping portion of the first portion on which the second portion is located is higher than a hardness of the first protruding, pattern.

13. An array substrate comprising:

a base substrate comprising a display area and a peripheral area;

a thin-film transistor disposed in the display area of the base substrate;

an insulation layer disposed in the display area of the base substrate, the insulation layer comprising a first portion covering the thin-film transistor and a second portion located on the first portion; and

a first protruding pattern disposed in the peripheral area of the base substrate,

wherein the first portion, the second portion, and the first protruding pattern comprise the same material, and

wherein a hardness of an overlapping portion of the first portion on which the second portion is located is higher than a hardness of a non-overlapping portion of the first portion.

14. A display device comprising:

an array substrate:

an opposing substrate facing the array substrate and comprising a light-blocking member; and

a liquid-crystal layer interposed between the array substrate and the opposing substrate, wherein the array substrate comprises:

a first base substrate comprising a display area and a peripheral area;

a thin-film transistor disposed in the display area of the first base substrate;

an insulation layer disposed in the display area of the first base substrate, the insulation layer comprising a first portion covering the thin-film transistor and a second portion protruding from the first portion toward the opposing substrate and overlapping the light-blocking member; and

a protruding pattern disposed in the peripheral area of the first base substrate and protruding toward the opposing substrate, and

wherein the first portion, the second portion, and the protruding pattern comprise the same material, and

wherein a hardness of an overlapping portion of the first portion on which the second portion is located is higher than a hardness of the protruding pattern.

15. The display device of claim 14 , wherein the opposing substrate further comprises a first spacing member overlapping the second portion.

16. The display device of claim 15 , wherein the opposing substrate further comprises a second spacing member overlapping the protruding pattern, and a thickness of the second spacing member is substantially equal to a thickness of the first spacing member.

17. The display device of claim 14 , wherein the second portion overlaps the thin-film transistor.

18. The display device of claim 14 , wherein the array substrate further comprises a circuit part disposed in the peripheral area of the first base substrate, and

wherein the circuit part comprises a plurality of contacts for electrically connecting wirings formed in the circuit part to one another, and the protruding pattern does not overlap the plurality of contacts.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2016
From: SHIN, DONG HEE; SONG, JAE JIN; KI, DONG HYEON
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 039022/0331 →
Priority Claims (1)
KR 10-2015-0147507 · Oct 22, 2015 · national
Continuity (1)
Related Publication 20170115518A1 · Apr 27, 2017