IP Library › Granted Patent US 10,043,786
Granted Patent B2
US 10,043,786 · App. 15/134,607 · Granted Aug 7, 2018

Composite protection circuit, composite protection element, and LED device for illumination

Inventor: Nobuo Sakai (Nagaokakyo, JP)
Assignee: MURATA MANUFACTURING CO., LTD.
H01L25/167H01L23/5252H01L27/0248H01L27/0255H01L29/866H01L33/62H05B33/089H01L2224/48091H01L2224/48247Y02B20/341
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Quick Facts
Patent No.
US 10,043,786
App. No.
15/134,607
Granted
Aug 7, 2018
Kind
B2
Abstract

A Zener diode used as an ESD protection element is connected in parallel to a circuit to be protected, for example an LED chip. The Zener diode is connected in parallel to an antifuse element. For example, an LED package (P 1 -Pn) includes the LED chip and a composite protection element connected in parallel thereto. The composite protection element includes the Zener diode and antifuse element. The Zener diode is formed in a semiconductor substrate, and the antifuse element is formed in a wiring layer on the semiconductor substrate.

Claims (22)

1. A combination, comprising

a circuit to be protected; and

a composite protection element including a Zener diode connected in parallel to the circuit to be protected and an antifuse element connected in parallel to the Zener diode, the composite protection element is formed on a single chip including a semiconductor substrate having a surface, the Zener diode is formed in the semiconductor substrate and the antifuse element is located on the surface of the semiconductor substrate, the antifuse element having a multilayer structure in which an insulation layer is disposed between electrode layers.

2. The combination of claim 1 , wherein the circuit to be protected is an LED chip for illumination.

3. The combination of claim 1 , wherein the circuit to be protected is an LED chip for illumination and the composite protection element and the LED chip are housed in a single package.

4. A composite protection element formed on a single chip, the composite protection element comprising:

a semiconductor substrate;

a Zener diode formed in the semiconductor substrate; and

an antifuse element connected in parallel with the Zener diode and is located on a surface of the semiconductor substrate, the antifuse element having a multilayer structure in which an insulation layer is disposed between electrode layers.

5. The composite protection element of claim 4 , wherein the composite protection element has a body including opposed front and a rear surfaces and further comprises first and second electrodes located on the front surface, the first and second electrodes being electrically coupled to respective electrode layers of the antifuse element.

6. The composite protection element of claim 4 , wherein the composite protection element has a body including opposed front and a rear surfaces and further comprises first and second electrodes located on the front and rear surfaces, respectively, the first and second electrodes being coupled to respective electrode layers of the antifuse element.

7. A combination, comprising:

a circuit to be protected;

a lead frame; and

a composite protection element electrically coupled to the lead frame, the composite element comprising a Zener diode connected in parallel to the circuit to be protected and an antifuse element connected in parallel to the Zener diode, the composite protection element is formed on a single chip including a semiconductor substrate having a surface, the Zener diode is formed in the semiconductor substrate and the antifuse element being located on the surface of the semiconductor substrate, the antifuse element having a multilayer structure in which an insulation layer is disposed between electrode layers.

8. The combination of claim 7 , wherein the composite protection element has a body including opposed front and a rear surfaces and further comprises first and second electrodes located on the front and rear surfaces, respectively, the first and second electrodes are coupled to respective electrode layers of the antifuse element.

9. The combination of claim 8 , wherein the first electrode is electrically coupled to the lead frame by a single wire and the second electrode is directly coupled to the lead frame without the use of a wire.

10. The composite protection element of claim 1 , wherein the composite protection element has a body including opposed front and a rear surfaces and further comprises first and second electrodes located on the front surface, the first and second electrodes being electrically coupled to respective electrode layers of the antifuse element.

11. The composite protection element of claim 10 , wherein the composite protection element has a body including opposed front and a rear surfaces and further comprises first and second electrodes located on the front and rear surfaces, respectively, the first and second electrodes being coupled to respective electrode layers of the antifuse element.

12. The combination of claim 1 , wherein the antifuse element is formed in a wiring layer.

13. The combination of claim 1 , wherein the antifuse element is embedded in a protective film located on the semiconductor substrate.

14. The combination of claim 1 , wherein the antifuse element overlaps the Zener diode in plan view.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2016
From: SAKAI, NOBUO
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 038340/0458 →
Priority Claims (1)
JP 2013-220738 · Oct 24, 2013 · national
Continuity (2)
Continuation PCTJP2014077895 · Oct 21, 2014
Related Publication 20160233201A1 · Aug 11, 2016