Semiconductor apparatus and semiconductor system including the same

1. A semiconductor apparatus comprising:

a package substrate; and

a semiconductor chip,

wherein the package substrate comprises:

a first substrate pad coupled with a package ball; and

a second substrate pad, and

wherein the semiconductor chip comprises:

a main pad coupled with the first substrate pad;

an auxiliary pad coupled with the second substrate pad; and

a first buffer coupled with the main pad and the auxiliary pad.

2. The semiconductor apparatus according to claim 1 ,

wherein transmission of a signal from the semiconductor chip to an external of the semiconductor chip is performed through the first substrate pad, and

wherein reception of a signal received externally from the semiconductor chip is performed through the first substrate pad.

3. The semiconductor apparatus according to claim 1 , wherein the main pad is wire-bonded with the first substrate pad, the auxiliary pad is wire-bonded with the second substrate pad, and the main pad and the auxiliary pad are indirectly coupled with each other.

4. The semiconductor apparatus according to claim 1 , wherein the main pad is coupled with the first substrate pad through a through electrode, and the main pad and the auxiliary pad are not coupled directly with each other.

5. The semiconductor apparatus according to claim 1 , further comprising:

a second buffer coupled with the first buffer, the auxiliary pad and an internal circuit of the semiconductor chip.

6. The semiconductor apparatus according to claim 5 , wherein the second buffer buffers a signal outputted from the first buffer and provides the buffered signal to the internal circuit of the semiconductor chip, or buffers a signal outputted from the internal circuit and provides the buffered signal to the first buffer.

7. A semiconductor apparatus comprising:

a package substrate; and

a first semiconductor chip and a second semiconductor chip stacked with the package substrate,

wherein the package substrate comprises:

a first substrate pad coupled with a package ball; and

a second substrate pad,

wherein the first semiconductor chip comprises:

a first main pad coupled with the first substrate pad;

a first auxiliary pad coupled with the second substrate pad;

a first buffer coupled with the first main pad; and

a second buffer coupled with the first buffer and the first auxiliary pad, and

wherein the second semiconductor chip comprises:

a second auxiliary pad coupled with the second substrate pad.

8. The semiconductor apparatus according to claim 7 ,

wherein transmission of a signal from the semiconductor chip to an external of the semiconductor chip is performed through the first substrate pad, and

wherein reception of a signal received externally from the semiconductor chip is performed through the first substrate pad.

9. The semiconductor apparatus according to claim 7 , wherein the first main pad is wire-bonded with the first substrate pad, the first auxiliary pad is wire-bonded with the second substrate pad, and the first main pad is indirectly coupled with the first auxiliary pad.

10. The semiconductor apparatus according to claim 7 , wherein the second buffer buffers a signal outputted from the first buffer and provides the buffered signal to an internal circuit of the first semiconductor chip, or buffer a signal outputted from the internal circuit and provides the buffered signal to the first buffer.

11. The semiconductor apparatus according to claim 7 , wherein the second auxiliary pad is wire-bonded with the second substrate pad.

12. The semiconductor apparatus according to claim 11 , further comprising:

a plurality of semiconductor chips stacked with the first and second semiconductor chips over the package substrate,

wherein each of the plurality of semiconductor chips comprises an auxiliary pad, and

wherein the auxiliary pad of each of the plurality of semiconductor chips is wire-bonded with the second substrate pad.

13. The semiconductor apparatus according to claim 12 ,

wherein the second semiconductor chip further comprises a second main pad, and each of the plurality of semiconductor chips further comprises a main pad, and

wherein the second main pad and main pads of the plurality of semiconductor chips are not wire-bonded with the first substrate pad.

14. The semiconductor apparatus according to claim 13 , further comprising:

a plurality of semiconductor chips stacked with the first and second semiconductor chips over the package substrate,

wherein each of the plurality of semiconductor chips comprises an auxiliary pad, and

wherein the auxiliary pad of each of the plurality of semiconductor chips is wire-bonded with the second substrate pad.

15. The semiconductor apparatus according to claim 7 ,

wherein the second semiconductor chip further comprises:

a second main pad;

a third buffer coupled with the second main pad; and

a fourth buffer coupled with the third buffer and the second auxiliary pad, and

wherein the second main pad is not wire-bonded with the first substrate pad.

16. A semiconductor apparatus comprising:

a package substrate; and

a first semiconductor chip stacked over the package substrate,

wherein the package substrate comprises:

a first substrate pad which is coupled with a package ball, and

wherein the first semiconductor chip comprises:

a main pad coupled with the first substrate pad;

an auxiliary pad; and

a buffer configured to couple the main pad and the auxiliary pad.

17. The semiconductor apparatus according to claim 16 ,

wherein the package substrate further comprises a second substrate pad,

wherein the semiconductor apparatus further comprises a plurality of semiconductor chips which are stacked with the first semiconductor chip,

wherein each of the plurality of semiconductor chips comprises a main pad and an auxiliary pad, and

wherein respective auxiliary pads of the plurality of semiconductor chips are wire-bonded with the second substrate pad, and main pads of the plurality of semiconductor chips are not wire-bonded with the first substrate pad.

18. The semiconductor apparatus according to claim 16 ,

wherein the semiconductor apparatus further comprises a plurality of semiconductor chips which are stacked with the first semiconductor chip,

wherein each of the plurality of semiconductor chips comprises a main pad and an auxiliary pad, and

wherein respective auxiliary pads of the plurality of semiconductor chips are coupled with one another through through electrodes, and main pads of the plurality of semiconductor chips are indirectly coupled with the first main pad and the first substrate pad.

19. The semiconductor apparatus according to claim 16 ,

wherein the package substrate further comprises a second substrate pad,

wherein the semiconductor apparatus further comprises a plurality of semiconductor chips which are stacked with the first semiconductor chip,

wherein each of the plurality of semiconductor chips comprises a main pad and an auxiliary pad,

wherein the first semiconductor chip and the plurality of semiconductor chips are classified into first to n^th groups, the main pad of at least one semiconductor chip of each group is wire-bonded with the first substrate pad, the auxiliary pad of the at least one semiconductor chip is wire-bonded with the second substrate pad, and the auxiliary pads of semiconductor chips of each group are wire-bonded with each other, and

wherein n is an integer equal to or greater than two.