IP Library Granted Patent US 10,050,106
Granted Patent B2
US 10,050,106 · App. 15/172,273 · Granted Aug 14, 2018

Manufacturing method for semiconductor device

Inventors: Masayuki Miyazaki (Matsumoto, JP); Takashi Yoshimura (Matsumoto, JP); Hiroshi Takishita (Matsumoto, JP); Hidenao Kuribayashi (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H01L29/0638H01L21/263H01L21/265H01L21/26506H01L21/324H01L29/1095H01L29/155H01L29/6609H01L29/66348H01L29/7395H01L29/7397H01L29/861
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Quick Facts
Patent No.
US 10,050,106
App. No.
15/172,273
Granted
Aug 14, 2018
Kind
B2
Abstract

A p + collector layer is provided in a rear surface of a semiconductor substrate which will be an n − drift layer and an n + field stop layer is provided in a region which is deeper than the p + collector layer formed on the rear surface side. A front surface element structure is formed on the front surface of the semiconductor substrate and then protons are radiated to the rear surface of the semiconductor substrate at an acceleration voltage corresponding to the depth at which the n + field stop layer is formed. A first annealing process is performed at an annealing temperature corresponding to the proton irradiation to change the protons into donors, thereby forming a field stop layer. Then, annealing is performed using annealing conditions suitable for the conditions of a plurality of proton irradiation processes to recover each crystal defect formed by each proton irradiation process.

Claims (88)

1. A method for manufacturing a semiconductor device comprising:

an irradiation step of radiating protons to a rear surface of a semiconductor substrate of a first conductivity type; and

an annealing step of activating the protons radiated to the rear surface of the semiconductor substrate to form a first semiconductor layer of the first conductivity type which has a higher impurity concentration than an impurity concentration of the semiconductor substrate,

wherein a set of the irradiation step and the annealing step is performed a plurality of times according to irradiation conditions of the irradiation step to form a plurality of the first semiconductor layers in a depth direction of the semiconductor substrate.

2. The method for manufacturing a semiconductor device according to claim 1 , wherein:

in an irradiation step of the set performed a plurality of times, as a depth of a region, in which the first semiconductor layer is formed, from the rear surface of the semiconductor substrate increases, an acceleration voltage increases,

in an annealing step of the set performed a plurality of times, as the depth of the region, in which the first semiconductor layer is formed, from the rear surface of the semiconductor substrate increases, an annealing temperature increases, and

the set of the irradiation step and the annealing step are sequentially performed the plurality of times, starting from a set of the irradiation step and the annealing step by which the first semiconductor layer is formed at a deepest position from the rear surface of the semiconductor substrate.

3. The method for manufacturing a semiconductor device according to claim 1 , wherein, in a set of the irradiation step and the annealing step of the plurality of times, one annealing step is performed after a plurality of irradiation steps.

4. The method for manufacturing a semiconductor device according to claim 1 , wherein one of the plurality of first semiconductor layers is a field stop layer that suppresses spreading of a depletion layer.

5. The method for manufacturing a semiconductor device according to claim 1 , wherein a number of first semiconductor layers formed by the set of the irradiation step and the annealing step performed the plurality of times is based on a thickness of the semiconductor substrate or a rated voltage, or both the thickness of the semiconductor substrate and the rated voltage.

6. The method for manufacturing a semiconductor device according to claim 1 , wherein the semiconductor device is an insulated gate bipolar transistor.

7. The method for manufacturing a semiconductor device according to claim 1 , wherein the semiconductor device is a diode.

8. The method for manufacturing a semiconductor device according to claim 1 , wherein:

a drift layer of the first conductivity type which is the semiconductor substrate is provided,

a second semiconductor layer of a second conductivity type is formed on a front surface of the semiconductor substrate,

when q is an elementary charge, N d is an average concentration of the drift layer, ε s is a permittivity of the semiconductor substrate, V rate is a rated voltage, J F is rated current density, and v sat is a saturated speed at which a speed of carriers is saturated with predetermined electric field intensity, a distance index L is represented by the following Expression (1):

L

=

ɛ

S

V

r

a

t

e

q

(

J

F

q

v

s

a

t

+

N

d

)

,

[

Expression

1

]

and

when a depth of a position where a carrier concentration of a first semiconductor layer of the plurality of first semiconductor layers closest to the second semiconductor layer is a peak concentration from the rear surface of the semiconductor substrate is X and a thickness of the semiconductor substrate is W 0 , the position where the carrier concentration of the first semiconductor layer of the plurality of first semiconductor layers closest to the second semiconductor layer is the peak concentration is set such that X=W 0 −γL is established and γ is equal to or greater than 0.2 and equal to or less than 1.5.

9. The method for manufacturing a semiconductor device according to claim 8 , wherein γ is equal to or greater than 0.9 and equal to or less than 1.4.

10. The method for manufacturing a semiconductor device according to claim 9 , wherein γ is equal to or greater than 1.0 and equal to or less than 1.3.

11. A method for manufacturing a semiconductor device comprising:

an irradiation step of radiating protons to a rear surface of a semiconductor substrate of a first conductivity type; and

an annealing step of activating the proton radiated to the rear surface of the semiconductor substrate to form a first semiconductor layer of the first conductivity type which has a higher impurity concentration than an impurity concentration of the semiconductor substrate, wherein:

a set of the irradiation step and the annealing step is performed a plurality of times to form a plurality of the first semiconductor layers in a depth direction of the semiconductor substrate,

in a first annealing step among the plurality of annealing steps, which forms a set together with a first irradiation step of radiating the protons to a deepest position from the rear surface of the semiconductor substrate among the plurality of irradiation steps, an annealing temperature is equal to or higher than 380° C. and equal to or lower than 450° C.,

in a second annealing step among the plurality of annealing steps, which forms a set together with a second irradiation step of radiating the protons to a second deepest position from the rear surface of the semiconductor substrate among the plurality of irradiation steps, the annealing temperature is equal to or higher than 350° C. and equal to or lower than 420° C., and

in a third annealing step among the plurality of annealing steps, which forms a set together with a third irradiation step of radiating the protons to a third deepest position from the rear surface of the semiconductor substrate among the plurality of irradiation steps, the annealing temperature is equal to or higher than 340° C. and equal to or lower than 400° C.

12. The method for manufacturing a semiconductor device according to claim 11 , wherein:

in the first annealing step, the annealing temperature is equal to or higher than 400° C. and equal to or lower than 420° C.,

in the second annealing step, the annealing temperature is equal to or higher than 370° C. and equal to or lower than 390° C., and

in the third annealing step, the annealing temperature is equal to or higher than 350° C. and equal to or lower than 370° C.

13. A method for manufacturing a semiconductor device comprising:

an irradiation step of radiating protons to a rear surface of a semiconductor substrate of a first conductivity type; and

an annealing step of activating the protons radiated to the rear surface of the semiconductor substrate to form a first semiconductor layer of the first conductivity type which has a higher impurity concentration than an impurity concentration of the semiconductor substrate,

wherein a set of one or more irradiation steps and one annealing step is performed a plurality of times according to irradiation conditions of the irradiation step to form a plurality of the first semiconductor layers in a depth direction of the semiconductor substrate.

14. The method for manufacturing a semiconductor device according to claim 1 , wherein, in an irradiation step of the one or more irradiation steps, acceleration energy E of the protons when the first semiconductor layer with a range Rp is formed by the radiation of the protons satisfies the following Expression (2):

y=− 0.0047 x 4 +0.0528 x 3 −0.2211 x 2 +0.9923 x + 5.0474  [Expression (2)]

(where x is a logarithm log(Rp) of the range Rp and y is a logarithm log(E) of the acceleration energy E).

15. The method for manufacturing a semiconductor device according to claim 1 , wherein a range of the protons from the rear surface of the semiconductor substrate is equal to or greater than 15 μm.

16. The method for manufacturing a semiconductor device according to claim 1 , further comprising:

a step of thinning the semiconductor substrate and implanting impurity ions for forming a semiconductor layer, which is a contact with a rear surface electrode, into the rear surface of the thinned semiconductor substrate; and

a step of forming the rear surface electrode on the rear surface of the semiconductor substrate,

wherein the annealing step is performed after the step of forming the rear surface electrode.

17. The method for manufacturing a semiconductor device according to claim 1 , wherein, as acceleration energy in the plurality of proton irradiation steps increases, a dose of the proton irradiation is reduced.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2016
From: MIYAZAKI, MASAYUKI; YOSHIMURA, TAKASHI; TAKISHITA, HIROSHI; KURIBAYASHI, HIDENAO
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 038793/0381 →
Priority Claims (1)
JP 2012-080684 · Mar 30, 2012 · national
Continuity (2)
Division 14372453
Related Publication 20160284796A1 · Sep 29, 2016
Cited By (1)
US 12,315,728