Multi-chip transceiver testing in a radar system

1. A radar system, comprising:

a first radar transceiver integrated circuit (IC) including transmission signal generation circuitry operable to generate a continuous wave signal and a first transmit channel coupled to the transmission generation circuitry to receive the continuous wave signal and transmit a test signal based on the continuous wave signal; and

a second radar transceiver IC including a first receive channel coupled to an output of the first transmit channel of the first radar transceiver IC via a loopback path to receive the test signal from the first transmit channel, the second radar transceiver IC operable to measure phase response in the test signal.

2. The radar system of claim 1 , including:

a third radar transceiver IC including a second receive channel coupled to an output of the first transmit channel of the first radar transceiver IC via the loopback path to receive the test signal from the first transmit channel, the third radar transceiver IC operable to measure phase response in the first test signal.

3. The radar system of claim 1 , in which phase mismatch between the first transmit channel and a second transmit channel of the second radar transceiver is determined as a difference between the phase response and internal phase response of the second transmit channel.

4. The radar system of claim 3 , in which the internal phase response of the second transmit channel is determined using one of an internal loopback path coupling the second transmit channel to a receive channel on the second radar transceiver IC, and a built-in self test (GIST) phase detector.

5. The radar system of claim 3 , in which phase mismatch between the first transmit channel and a third transmit channel of the second radar transceiver IC is determined as a sum of the phase response and phase mismatch between the second transmit channel and the third transmit channel.

6. The radar system of claim 1 , in which the loopback path includes a switch coupled to an output of the first transmit channel, the switch operable to provide an output signal of the first transmit channel to an antenna of the first transmit channel when the first radar transceiver IC is operated in normal mode and to the loopback path when the first radar transceiver IC is operated in test mode.

7. The radar system of claim 1 , in which the first transmit channel is used only when the first radar transceiver IC is operated in test mode to provide the test signal to the loopback path.

8. The radar system of claim 1 , in which the loopback path includes a switch coupled to an input of the second receive channel, the switch operable to provide a signal received by an antenna of the second receive channel to the second receive channel when the second radar transceiver IC is operated in normal mode, and to provide a signal from the loopback path to the second receive channel when the second radar transceiver IC is operated in test mode.

9. The radar system of claim 1 , in which the second receive channel is used only when the second radar transceiver IC is operated in test mode to receive the test signal from the loopback path.

10. The radar system of claim 1 , in which the first radar transceiver IC is a master radar transceiver IC and the second radar transceiver IC is a slave radar transceiver IC.

11. A method for measuring phase response between radar transceiver integrated circuits (IC) in a radar system, the method comprising:

receiving a test signal in a first receive channel of a first radar transceiver IC in the radar system, the test signal received from a first transmit channel of a second radar transceiver IC in the radar system, the first transmit channel coupled to the first receive channel via a loopback path; and

measuring phase response in the test signal in the first radar transceiver IC.

12. The method of claim 11 , including:

receiving the test signal in a second receive channel of a third radar transceiver IC in the radar system, the transmit channel coupled to the second receive channel via the loopback path; and

measuring phase response in the test signal in the third radar transceiver IC.

13. The method of claim 11 , including determining phase mismatch between the first transmit channel and a second transmit channel of the first radar transceiver IC as a difference between the phase response and internal phase response of the second transmit channel.

14. The method of claim 13 , in which the internal phase response of the second transmit channel is determined using one of an internal loopback path coupling the second transmit channel to a receive channel on the first radar transceiver IC, and a built-in self test (BIST) phase detector.

15. The method of claim 13 , including determining phase mismatch between the first transmit channel and a third transmit channel of the first radar transceiver IC as a sum of the phase response and phase mismatch between the second transmit channel and the third transmit channel.

16. The method of claim 11 , including setting a switch in the loopback path to direct the test signal to the first receive channel.

17. The method of claim 16 , in which the switch is operable to provide an output signal of the first transmit channel to an antenna of the first transmit channel when the second radar transceiver IC is operated in normal mode and to the loopback path when the second radar transceiver IC is operated in test mode.

18. The method of claim 16 , in which the switch is operable to provide a signal received by an antenna of the first receive channel to the first receive channel when the first radar transceiver IC is operated in normal mode, and to provide a signal from the loopback path to the first receive channel when the first radar transceiver IC is operated in test mode.

19. The method of claim 11 , in which the first transmit channel is used only when the second radar transceiver IC is operated in test mode.

20. The method of claim 11 , in which the first receive channel is used only when the first radar transceiver IC is operated in test mode.