IP Library › Granted Patent US 10,065,855
Granted Patent B2
US 10,065,855 · App. 15/568,140 · Granted Sep 4, 2018

Integrated circuit comprising multi-layer micromechanical structures with improved mass and reliability by using modified vias and method for forming the same

Inventors: Piotr Jozef Michalik (Barcelona, ES); Daniel Fernández Martínez (Pallejà, ES); Jordi Madrenas Boadas (Barcelona, ES)
Assignees: UNIVERISTAT POLITECNICA DE CATALUNYA; Daniel Fernandez Martinez
B81C1/00682B81B3/0021B81B3/0094B81B7/0006B81C1/00142B81C1/00301B81B2201/0235B81B2201/0242B81B2203/0163
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Quick Facts
Patent No.
US 10,065,855
App. No.
15/568,140
Granted
Sep 4, 2018
Kind
B2
Abstract

An integrated circuit and the method to produce the integrated circuit comprising: a substrate ( 10 ); active devices ( 11 ); plurality of metal layers ( 17 ), wherein said metal layers are separated by dielectric layers ( 13 ) and connected to each other by plurality of vias ( 19 ); at least one micromechanical region ( 15 ) wherein some of the dielectric layers are removed leaving hollow spaces ( 23 ), thereby some of said metal and via layers form a micromechanical device in said micromechanical region, wherein said micromechanical device comprises at least one multi-layer structure ( 165 ) that is built of a plurality of metal layers and at least one via layer and said multi-layer structure is characterized by that at least two metal layers of said multi-layer structure are joined by at least one modified via ( 41 ).

Claims (25)

1. An integrated circuit comprising:

a substrate ( 10 );

active devices ( 11 );

a plurality of metal layers ( 17 ), wherein said metal layers are separated by dielectric layers ( 13 ) and connected to each other by a plurality of vias ( 19 ); and

at least one micromechanical region ( 15 ) wherein some of the dielectric layers are removed leaving hollow spaces ( 23 ), thereby some of said metal and via layers form a micromechanical device in said micromechanical region,

wherein said micromechanical device comprises at least one multi-layer structure ( 165 ) that is built of a plurality of metal and at least one via layer,

wherein at least two metal layers of said multi-layer structure ( 165 ) are joined by at least one modified via ( 41 ) comprising a void space ( 44 ), wherein said void space is at least partially filled by the metal layer situated on top of said modified via,

wherein the void space is situated in the part of the area of the via that is substantially distant from a via opening perimeter ( 35 ), and

wherein in the at least one modified via ( 41 ), an area of the via that is substantially distant from the via opening perimeter ( 35 ) specifically occurs at a cross ( 414 ) or junction ( 413 ) of at least two via bars.

2. The integrated circuit according to claim 1 , wherein some of the via bars are arranged in a form of mesh ( 417 , 418 ).

3. The integrated circuit according to claim 1 , wherein the multi-layer structure ( 165 ) contains at least one metal layer that is thicker than other metal layers.

4. The integrated circuit according to claim 1 , wherein at least one multi-layer structure ( 165 ) is arranged as a part of movable mass electrically coupled to an electronic circuit and said electronic circuit is at least partially arranged from the active devices at the same substrate, thereby said electronic circuit converts a position of said mass with respect to the substrate into an electrical signal and/or said electronic circuit changes the position of the mass with respect to the substrate by applying a proper electrical signal.

5. The integrated circuit according to claim 4 , wherein the movable mass is a part of an acceleration sensor, gyroscope or their combination.

6. The integrated circuit according to claim 1 wherein some of the active devices are situated under the micromechanical region ( 15 ).

7. A method of manufacturing of an integrated circuit comprising a substrate, at least one micromechanical region ( 15 ) with at least one multilayer structure ( 165 ), the method including:

producing active devices ( 11 ) on the substrate ( 10 );

patterning and depositing metals ( 17 ), vias ( 19 ) and inter-metal dielectric (IMD) layers ( 13 );

removing the sacrificial part of IMD layers within the micromechanical regions, thereby creating hollow spaces ( 23 ),

wherein in the micromechanical regions, the via deposition process does not fill entirely the parts of at least a modified via ( 41 ) said parts being substantially distant from a via opening perimeter ( 35 ), thereby producing voids ( 44 ) in said vias, so that the subsequent metal deposition at least partially fills the void with the subsequent metal layer, thereby producing vertical extension ( 45 ) of said subsequent metal layer towards the void ( 44 ) in the modified via ( 41 ), and

wherein in the at least one modified via ( 41 ), the area of the via that is substantially distant from the via opening perimeter ( 35 ) specifically occurs at a cross ( 414 ) or junction ( 413 ) of at least two via bars.

8. The method according to claim 7 , wherein the modified vias ( 41 ) are produced using chemical vapour deposition process.

9. The method according to claim 7 , wherein the vias contain Tungsten or any Tungsten alloy.

10. The method according to claim 7 , wherein the dielectric layer is removed from a micromechanical region by means of wet or dry isotropic etching.

11. The method according to claim 7 , wherein the dielectric layers contain silicon dioxide.

12. The method according to claim 7 , wherein the metal layers contain Aluminum or Copper or Aluminum-Copper alloy.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 23, 2018
From: MICHALIK, PIOTR JOZEF; FERNÁNDEZ MARTÍNEZ, DANIEL; MADRENAS BOADAS, JORDI
To: UNIVERSITAT POLITÈCNICA DE CATALUNYA; FERNÁNDEZ MARTÍNEZ, DANIEL
Reel/Frame 046422/0392 →
Priority Claims (1)
EP 15164506 · Apr 21, 2015 · regional
Continuity (1)
Related Publication 20180148329A1 · May 31, 2018