IP Library › Granted Patent US 10,068,121
Granted Patent B2
US 10,068,121 · App. 15/084,363 · Granted Sep 4, 2018

Baseline compensation for capacitive sensing

Inventors: Viktor Kremin (Lviv, UA); Kaveh Hosseini (Cork, IE); Roman Ogirko (Lviv, UA); Andriy Maharyta (Lviv, UA)
Assignee: Cypress Semiconductor Corporation
G06K9/0002G06F3/044G06F3/0418
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Quick Facts
Patent No.
US 10,068,121
App. No.
15/084,363
Granted
Sep 4, 2018
Kind
B2
Abstract

A capacitance sensing circuit may include a charge to digital converter, coupled to a signal receiver channel, to receive a signal from a capacitive sense array. The capacitance sensing circuit may also include a baseline compensation signal generator, coupled to the signal receiver channel, to provide a baseline compensation signal in an opposite phase of the signal to the signal receiver channel.

Claims (76)

1. An apparatus comprising:

a signal generator to generate a transmission signal;

a baseline compensation signal generator coupled to the signal generator, the baseline compensation signal generator to:

receive the transmission signal from the signal generator; and

generate, using a resistor-capacitor (RC) circuit of the baseline compensation signal generator, a baseline compensation signal that is in an opposite phase of the transmission signal;

a signal receiver channel coupled to a capacitive sense array and the baseline compensation signal generator, the signal receiver channel being connected in series with the RC circuit, the signal receiver channel to:

receive a receiving signal from the capacitive sense array and the baseline compensation signal from the baseline compensation signal generator; and

generate a compensated receiving signal based on the receiving signal and the baseline compensation signal; and

a charge to digital converter, coupled to the signal receiver channel, the charge to digital converter to:

receive the compensated receiving signal from the signal receiver channel; and

convert the compensated receiving signal to digital code.

2. The apparatus of claim 1 , wherein:

the signal generator is to provide the transmission signal to an element of the capacitive sense array,

the baseline compensation signal generator further comprises:

a switch to apply the baseline compensation signal to the signal receiver channel in the opposite phase of the transmission signal.

3. The apparatus of claim 1 , further comprising:

a second signal receiver channel to receive a second signal from the capacitive sense array; and

a second baseline compensation signal generator, coupled to the second signal receiver channel, to generate a second baseline compensation signal in an opposite phase of the second signal.

4. The apparatus of claim 1 , further comprising:

a second signal receiver channel to receive a second signal from the capacitive sense array;

a first variable capacitor coupled to the baseline compensation signal generator and coupled to the signal receiver channel; and

a second variable capacitor coupled to the baseline compensation signal generator and coupled to the second signal receiver channel,

wherein the first variable capacitor and the second variable capacitor are independently adjustable.

5. The apparatus of claim 1 , further comprising:

a second signal receiver channel to receive a second signal from the capacitive sense array;

a multiple output current conveyor coupled to the baseline compensation signal generator and having a first output and a second output, wherein the first output is coupled to the signal receiver channel and the second output is coupled to the second signal receiver channel;

a first variable capacitor coupled to the first output of the multiple output current conveyor; and

a second variable capacitor coupled to the second output of the multiple output current conveyor.

6. The apparatus of claim 1 , wherein the capacitive sense array comprises:

a first plurality of capacitive elements to generate a signal in response to an input; and

a second plurality of capacitive elements protected from the input, wherein the second plurality of capacitive elements generate the baseline compensation signal.

7. The apparatus of claim 1 , wherein the baseline compensation signal generator comprises a plurality of capacitors coupled to the signal generator and to the signal receiver channel.

8. The apparatus of claim 1 , wherein:

the signal receiver channel comprises a differential input; and

the baseline compensation signal generator comprises:

a first current source to provide the baseline compensation signal to a first input terminal of the differential input; and

a second current source to provide the baseline compensation signal to a second input terminal of the differential input.

9. The apparatus of claim 1 , wherein:

the signal receiver channel comprises a first current conveyor to provide the receiving signal from the capacitive sense array to the charge to digital converter and mirror the receiving signal to a second current conveyor; and

the baseline compensation signal generator comprises the first current conveyor coupled to the second current conveyor.

10. The apparatus of claim 1 , wherein the baseline compensation signal generator comprises a switching capacitor current source.

11. The apparatus of claim 10 , wherein the switching capacitor current source is calibrated by a processing device.

12. The apparatus of claim 11 , wherein the processing device calibrates the switching capacitor current source on power-up or in response to changes in operation during run-time.

13. The apparatus of claim 1 , wherein the receiving signal received by the signal receiver channel is indicative of a fingerprint input to the capacitive sense array.

14. A system comprising:

a host processor;

a capacitive sense array; and

a processing device coupled to the host processor and the capacitive sense array, the processing device comprising:

a signal generator to generate a transmission signal;

a baseline compensation signal generator coupled to the signal generator, the baseline compensation signal generator to:

receive the transmission signal from the signal generator;

generate, using a resistor-capacitor (RC) circuit of the baseline compensation signal generator, a baseline compensation signal in an opposite phase of the transmission signal, wherein the baseline compensation signal is based at least in part on the transmission signal applied to the capacitive sense array;

a signal receiver channel coupled to a sensor array and the baseline compensation signal generator, the signal receiver channel being connected in series with the RC circuit, the signal receiver channel to:

receive a receiving signal from the sensor array and the baseline compensation signal from the baseline compensation signal generator; and

generate a compensated receiving signal based on the receiving signal and the baseline compensation signal; and

a charge to digital converter coupled to the signal receiver channel, the charge to digital converter to:

receive the compensated receiving signal from the capacitive sense array; and

convert the compensated receiving signal to digital code.

15. The system of claim 14 , wherein the baseline compensation signal generator comprises a switch to selectively apply the baseline compensation signal, in the opposite phase of the transmission signal, through a current limiting circuit to the signal receiver channel.

16. The system of claim 14 , further comprising:

a second signal receiver channel to receive a second signal from the capacitive sense array;

a multiple output current conveyor, coupled to the baseline compensation signal generator and having a first output and a second output, wherein the first output is coupled to the signal receiver channel and the second output is coupled to the second signal receiver channel;

a first variable capacitor coupled to the first output of the multiple output current conveyor; and

a second variable capacitor coupled to the second output of the multiple output current conveyor.

17. The system of claim 14 , wherein the capacitive sense array comprises:

a first plurality of capacitive elements to generate a signal in response to the transmission signal; and

a second plurality of capacitive elements to generate an opposite phase average capacitance signal in response to the transmission signal,

wherein the capacitive sense array comprises a fingerprint sensor array.

18. The system of claim 14 , wherein a transmission signal generator is coupled to the capacitive sense array, the transmission signal generator to provide the transmission signal comprising a differential input to the capacitive sense array, wherein the baseline compensation signal generator comprises a plurality of capacitors coupled to the transmission signal generator and to the signal receiver channel.

19. A method comprising:

providing, by a signal generator, a transmission signal to a capacitive sense array and a baseline compensation signal generator;

generating, by a compensation signal generator, a baseline compensation signal based at least in part on the transmission signal;

receiving, by a signal receiver channel, a receiving signal from the capacitive sense array;

injecting the baseline compensation signal onto the signal receiver channel through a resistor-capacitor circuit connected in series with the signal receiver channel to generate a compensated receiving signal based on the receiving signal and the baseline compensation signal; and

providing the compensated receiving signal as an input to a charge to digital converter.

20. The method of claim 19 , wherein the signal received by the signal receiver channel is indicative of a fingerprint input to the capacitive sense array.

Assignments (6)
MERGER Recorded Nov 14, 2025
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 073571/0456 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST Recorded Dec 5, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 051209/0721 →
CORRECTIVE ASSIGNMENT TO CORRECT THE FOLLOWING NUMBERS 6272046,7277824,7282374,7286384,7299106,7337032,7460920,7519447 PREVIOUSLY RECORDED ON REEL 039676 FRAME 0237. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Oct 16, 2018
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING
Reel/Frame 047797/0854 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2018
From: KREMIN, VIKTOR; OGIRKO, ROMAN; MAHARYTA, ANDRIY; HOSSEINI, KAVEH
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 044715/0607 →
SECURITY INTEREST Recorded Aug 15, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039676/0237 →
Continuity (3)
Provisional Application 62212320 · Aug 31, 2015
Provisional Application 62280237 · Jan 19, 2016
Related Publication 20170061188A1 · Mar 2, 2017